STS1TX datasheet(25/70 Pages) STMICROELECTRONICS

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STS1TX

Operating modes

release threshold voltage VRRT (provided that SDN is low), as shown below. The same reset

pulse is generated after a step-down on the input pin SDN (provided that VDD>VRRT).

Figure 5. Power-on reset timing and limits

The parameters VRRT and TRESET are fixed by design. At RESET, all the registers are

initialized to their default values. Typical and extreme values are reported in the following

table.

Note:

An SRES command is also available, which generates an internal RESET of the STS1TX.

7.2

Timer usage

Most of the timers are programmable via R/W registers. All timer registers are made up of

two bytes: the first byte is a multiplier factor (prescaler); the second byte is a counter value.

Note:

If the counter register value (prescaler register value) is 0, the related timer never stops

(infinite timeout), despite the value written in the prescaler register (counter register).

The available timers and their features are listed in the following table.

Table 20. POR parameters

Symbol

Parameter

Min. Typ. Max.

Unit

VRRT

Reset startup threshold voltage

0.5

TRESET

Reset pulse width

0.24

0.65

1.0

Timer period= PRESCALER x COUNTER x Tclk

STS1TX 数据表(PDF) 25 Page - STMicroelectronics