STS1TX datasheet(42/70 Pages) STMICROELECTRONICS

42 / 70 page

Transmission and reception

STS1TX

42/70

DocID025109 Rev 1

Figure 8. LFSR block diagram

It is recommended to always enable data whitening.

9.4.4

Data padding

If FEC is enabled then the total length of payload and CRC must be an even number (in

order to completely fill up the interleaver). If not, a proper filling byte is automatically inserted

in transmission and removed by the receiver. The total packet length is affected, and it is

configured automatically enabling the FEC.

9.5

Packet handler engine

Before on-the-air transmission, raw data is properly cast into a packet structure. The

STS1TX offers a highly flexible and fully programmable packet; the structure of the packet,

the number, the type, and the dimension of the fields inside the packet depend on one of the

possible configuration settings. Through a suitable register the user can choose the packet

configuration from three options: STack, WM-Bus, and Basic.

The current packet format is set by the PCK_FRMT field of the PCKTCTRL3 register. In

particular:

•

0 Basic packet format

•

2 MBUS packet format

•

3 STack packet format.

The general packet parameters which can be set by the user are listed and described

hereafter. Some particular restrictions are possible depending on the selected packet

format.

9.5.1

STack packet

AM03940v1

Tout

1-32

1-4

0-16 bit

0-4

2 bit

1 bit

0-65535

0-3

Preambl

Sync

Length

Dest.

address

Source

address

Control Seq. No. NO_ACK Payload

CRC

STS1TX 数据表(PDF) 42 Page - STMicroelectronics

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