STS1TX datasheet(28/70 Pages) STMICROELECTRONICS

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Block description

STS1TX

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DocID025109 Rev 1

Both blocks can be optionally activated to provide the MCU with an early warning of

impending power failure. It does not reset the system, but gives the MCU time to prepare for

an orderly power-down and provides hardware protection of data stored in the program

memory, by preventing write instructions being executed.

The low battery indicator function is available in any of the STS1TX operating modes. As

this function requires the internal bias circuit operation, the overall current consumption in

STANDBY, SLEEP, and READY modes is increased by 400 µA.

8.4

Voltage reference

This block provides the precise reference voltage needed by the internal circuit.

8.5

Oscillator and RF synthesizer

A crystal connected to XIN and XOUT is used to provide a clock signal to the frequency

synthesizer. The allowed clock signal frequency is either 24, 26, 48, or 52 MHz. As an

alternative, an external clock signal can be used to feed XIN for proper operation. In this

option, XOUT can be left either floating or tied to ground.

Since the digital macro cannot be clocked at that double frequency (48 MHz or 52 MHz), a

divided clock is used in this case.

The digital clock divider is enabled by default and must be kept enabled if the crystal is in

the (48 - 52) MHz range; if the crystal is in the (24 - 26) MHz range, then the divider must be

disabled before starting any TX operation. The safest procedure to disable the divider

without any risk of glitches in the digital clock is to switch into STANDBY mode, thereby

resetting the bit-field PD_CLKDIV in the XO_RCO_TEST register, and then return to the

READY state. Also, the synthesizer reference signal can be divided by 2, setting the bit-field

REFDIV in the SYNTH_CONFIG register.

The integrated phase locked loop (PLL) is capable of synthesizing a wide band of

frequencies, in particular the bands from 150 to 174 MHz, from 300 to 348 MHz, from 387 to

470 MHz, or from 779 to 956 MHz, the input signal for the PA in the TX chain.

Frequency tolerance and startup times depend on the crystal used, although some tuning of

the latter parameter is possible through the GM_CONF field of the ANA_FUNC_CONF

registers.

Table 23. Programmability of trans-conductance at startup

GM_CONF[2:0]

Gm at startup [mS]

000

13.2

001

18.2

010

21.5

011

25.6

100

28.8

101

33.9

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