TNETV1647GSTZWT datasheet(5/236 Pages) TI1

5 / 236 page

JTAG Interface

System Control

PLLs/Clock

Generator

Input

Clock(s)

Power/Sleep

Controller

Multiplexing

ARM Subsystem

ARM926EJ-S CPU

16 KB

I-Cache

16 KB RAM

8 KB

D-Cache

8 KB ROM

DSP Subsystem

C64x+

t DSP CPU

32 KB

L1 Pgm

64 KB L2 RAM

80 KB

L1 Data

Video-Imaging

Coprocessor (VICP)

BT.656,

Y/C,

Raw (Bayer)

Video Processing Subsystem (VPSS)

CCD

Controller

Video

Interface

Front End

Resizer

Histogram/

Preview

10b DAC

On-Screen

Display

(OSD)

Video

Encoder

(VENC)

10b DAC

Back End

8b BT.656,

Y/C,

24b RGB

NTSC/

PAL,

S-Video,

RGB,

YPbPr

Switched Central Resource (SCR)

Peripherals

EDMA3

Audio

Serial

Port

I2C

SPI

UART

Serial Interfaces

DDR2

Mem Ctlr

(16b/32b)

Async EMIF/

NAND/

SmartMedia

ATA/

Compact

Flash

MMC/

SD/

SDIO

Program/Data Storage

Watchdog

Timer

PWM

System

General-

Purpose

Timer

USB 2.0

PHY

VLYNQ

EMAC

With

MDIO

Connectivity

MS/

MS PRO

HPI

TMS320DM6441

www.ti.com

SPRS359E – SEPTEMBER 2006 – REVISED AUGUST 2010

1.3

Functional Block Diagram

Figure 1-1 shows the functional block diagram of the device.

Figure 1-1. TMS320DM6441 Functional Block Diagram

Digital Media System-on-Chip (DMSoC)

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Product Folder Link(s): TMS320DM6441

TNETV1647GSTZWT 数据表(PDF) 5 Page - Texas Instruments

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