ST7LITEUS2 datasheet(59/136 Pages) STMICROELECTRONICS

59 / 136 page

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ST7LITEUS2, ST7LITEUS5

I/O ports

59/136

I/O ports

9.1

Introduction

The I/O port offers different functional modes:

●

Transfer of data through digital inputs and outputs

and for specific pins:

●

External interrupt generation

●

Alternate signal input/output for the on-chip peripherals.

An I/O port contains up to 6 pins. Each pin (except PA3/RESET) can be programmed

independently as digital input (with or without interrupt generation) or digital output.

9.2

Functional description

Each port has 2 main registers:

●

Data register (DR)

●

Data Direction register (DDR)

and one optional register:

●

Option register (OR)

Each I/O pin may be programmed using the corresponding register bits in the DDR and OR

registers: bit X corresponding to pin X of the port. The same correspondence is used for the

DR register.

The following description takes into account the OR register, (for specific ports which do not

provide this register refer to the I/O Port Implementation section). The generic I/O block

diagram is shown in Figure 28.

9.2.1

Input modes

The input configuration is selected by clearing the corresponding DDR register bit.

In this case, reading the DR register returns the digital value applied to the external I/O pin.

Different input modes can be selected by software through the OR register.

Note:

Writing the DR register modifies the latch value but does not affect the pin status.

PA3 cannot be configured as input.

External interrupt function

When an I/O is configured as Input with Interrupt, an event on this I/O can generate an

external interrupt request to the CPU.

Each pin can independently generate an interrupt request. The interrupt sensitivity is

independently programmable using the sensitivity bits in the EICR register.

External interrupts are hardware interrupts. Fetching the corresponding interrupt vector

automatically clears the request latch. Changing the sensitivity of a particular external

interrupt clears this pending interrupt. This can be used to clear unwanted pending

interrupts.

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