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ST7LITEUS2 数据表(PDF) 93 Page - STMicroelectronics |
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ST7LITEUS2 数据表(HTML) 93 Page - STMicroelectronics |
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93 / 136 page  Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) ST7LITEUS2, ST7LITEUS5 Electrical characteristics 93/136 12.1.5 Pin input voltage The input voltage measurement on a pin of the device is described in Figure 38. Figure 38. Pin input voltage 12.2 Absolute maximum ratings Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 1. Directly connecting the I/O pins to VDD or VSS could damage the device if an unexpected change of the I/O configuration occurs (for example, due to a corrupted program counter). To guarantee safe operation, this connection has to be done through a pull-up or pull-down resistor (typical: 10 k Ω for I/Os). Unused I/O pins must be tied in the same way to V DD or VSS according to their reset configuration. VIN ST7 PIN Table 43. Voltage characteristics Symbol Ratings Maximum value Unit VDD - VSS Supply voltage 7.0 V VIN Input voltage on any pin(1) 1. IINJ(PIN) must never be exceeded. This is implicitly insured if VIN maximum is respected. If VIN maximum cannot be respected, the injection current must be limited externally to the IINJ(PIN) value. A positive injection is induced by VIN>VDD while a negative injection is induced by VIN<VSS. VSS-0.3 to VDD+0.3 VESD(HBM) Electrostatic discharge voltage (Human Body Model) see Section 12.7.2 VESD(MM) Electrostatic discharge voltage (Machine Model) see Section 12.7.2 Obsolete Product(s) - Obsolete Product(s) |
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