WM8803CDTSLASHV datasheet(39/45 Pages) WOLFSON

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WM8803

PP Rev 1.1 September 2003

DO7

DO6

DO5

DO4

DO3

DO2

DO1

DO0

FSCAL2

FSCAL1

FSCAL0

OUTPCM

OUTERR

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 23

Bit 22

Bit 21

Bit 20

Bit 19

Bit 18

Bit 17

Bit 16

Bit 31

Bit 30

Bit 29

Bit 28

Bit 27

Bit 26

Bit 25

Bit 24

Bit 39

Bit 38

Bit 37

Bit 36

Bit 35

Bit 34

Bit 33

Bit 32

Bit 47

Bit 46

Bit 45

Bit 44

Bit 43

Bit 42

Bit 41

Bit 40

Table 22 Output Register: Input fs Calculation Result and Channel Status Data (0xEC)

Error information, non-PCM information, input fs calculation result, and channel status data can be

read from this register. Note that the error information and the non-PCM data information are the

same as those read from 0xEB.

OUTERR:

ERROR output

(Outputs the state when read)

0: No transmission error and the PLL circuit is in the PLL locked state

1: Either a transmission error occurred or the PLL circuit is in the unlocked

state.

OUTPCM:

AUDIO

output (Outputs the state when read)

0: Non-PCM signal not detected.

1: Non-PCM signal detected.

The input data fs calculation result is allocated as shown in Table 23. The target calculation

frequencies differ depending on the FS4XIN setting. The calculation range differs slightly depending

on the XIN clock frequency.

FS4XIN = 0

FS4XIN = 1

FSCAL2

FSCAL1

FSCAL0

TARGET

CALCULATED

RANGE

TARGET

CALCULATED

RANGE

Out of range

—

Out of range

—

32kHz

30.9k to 33.2kHz

64kHz

62.0k to 66.4kHz

44.1kHz

42.5k to 45.8kHz

88.2kHz

85.5k to 91.0kHz

48kHz

46.3k to 49.9kHz

96kHz

92.6k to 99.0kHz

64kHz

62.1k to 66.4kHz

128kHz

124.0k to 132.8kHz

88.2kHz

85.6k to 91.0kHz

176.4kHz

171.0k to 182.2kHz

96kHz

92.6k to 99.0kHz

192kHz

185.1k to 198.0kHz

—

Table 23 Input fs Calculation Result (Ta = 25°C, VDD = 3.3V, XIN = 11.2896MHz)

The channel status reads out the first 48bits of the data.

Since the channel status consists of 192 frames, updated data can always be read out by reading

with a period 192 times the period of the input sampling frequency.

The processing load on the micro-controller can be reduced by setting the E/INT pin to interrupt the

output and using the update flag interrupt to read out the data. This flag is output when a comparison

of the first 48bits of the current data and the data for the previous block indicates that they are the

same.

WM8803CDT/V 数据表(PDF) 39 Page - Wolfson Microelectronics plc

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