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WM8803CDT/V 数据表(PDF) 14 Page - Wolfson Microelectronics plc

部件名 WM8803CDT/V
功能描述  DIGITAL AUDIO INTERFACE RECEIVER
PDF  45 Pages
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制造商  WOLFSON [Wolfson Microelectronics plc]
网页  http://www.wolfsonmicro.com
标志 WOLFSON - Wolfson Microelectronics plc

WM8803CDT/V 数据表(HTML) 14 Page - Wolfson Microelectronics plc

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WM8803
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PP Rev 1.1 September 2003
14
512fs set
Data input
(512/2)fs set
PLLCK0 = 1
PLLCK1 = 1
CLKOUT output
24.576 MHz
PLLCK0 = 0
PLLCK1 = 1
Yes
No
fs = 96 kHz
fs = 48 kHz
LOCK
detection
fs
calculation
Figure 6 Flowchart for CLKOUT Output Clock Narrow Band Operation
The tables below show the output clocks in XIN and PLL clock source modes.
PLLCK1
PLLCK0
XISEL1
XISEL0
CLKOUT
BCLK
LRCLK
0
0
0
0
11.2896MHz
2.8224MHz
44.1kHz
0
0
0
1
12.2880MHz
3.0720MHz
48kHz
0
0
1
0
16.9344MHz
4.2336MHz
66.15kHz
0
1
0
0
11.2896MHz
1.8816MHz
29.4kHz
0
1
0
1
12.2880MHz
2.0480MHz
32kHz
0
1
1
0
16.9344MHz
2.8224MHz
44.1kHz
1
0
0
0
11.2896MHz
2.8224MHz
44.1kHz
1
0
0
1
12.2880MHz
3.0720MHz
48kHz
1
0
1
0
16.9344MHz
4.2336MHz
66.15kHz
1
1
0
0
11.2896MHz
2.8224MHz
44.1kHz
1
1
0
1
12.2880MHz
3.0720MHz
48kHz
1
1
1
0
16.9344MHz
4.2336MHz
66.15kHz
Table 6 XIN Clock Source Mode Output Clocks
Note:
1.
XISEL2 = 0, PLL unlocked state or forced setting



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