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WM8803CDT/V 数据表(PDF) 4 Page - Wolfson Microelectronics plc

部件名 WM8803CDT/V
功能描述  DIGITAL AUDIO INTERFACE RECEIVER
PDF  45 Pages
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制造商  WOLFSON [Wolfson Microelectronics plc]
网页  http://www.wolfsonmicro.com
标志 WOLFSON - Wolfson Microelectronics plc

WM8803CDT/V 数据表(HTML) 4 Page - Wolfson Microelectronics plc

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WM8803
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w
PP Rev 1.1 September 2003
4
PIN DESCRIPTION
PIN
NAME
TYPE
DESCRIPTION
1
XOUT
Analogue Output
Oscillation amplifier circuit output pin
2
ERROR
Digital Output
PLL lock error and data error output pin
3
PD
5
Digital Input
System reset and low power mode control input pin (5V tolerant)
4
NC
Digital Input
Non connection
5
CE
5
Digital Input
Micro-controller interface: chip enable input pin (5V tolerant)
6
CL
5
Digital Input
Micro-controller interface: serial clock input pin (5V tolerant)
7
DI
5
Digital Input
Micro-controller interface: write data input pin (5V tolerant)
8
DO
Digital Output
Micro-controller interface: read data output pin
9
E / INT
Digital Output
Pre-emphasis detection or micro-controller interface interrupt output pin
10
AUDIO
Digital Output
Channel status bit 1 non-PCM data detection output pin
11
UGPI
Digital Output
User general purpose interface output pin
1
12
RXIN
5
Digital Input
Digital data input pin (5V tolerant)
13
DVDD
Supply
Digital system power supply
14
AVDD
Supply
Analog system power supply
15
LPF
Analogue Output
PLL loop filter connection pin
16
NC
No connection
17
AGND
Supply
Analog system ground
18
DGND
Supply
Digital system ground
19
CLKOUT
Digital Output
System clock output pin
2
20
BCLK
Digital Output
64fs clock output pin
21
LRCLK
Digital Output
Fs clock output pin
3
22
SDATO
Digital Output
Demodulated data output pin
23
SDIN
Digital Input
Serial digital data input pin (5V tolerant)
24
XIN
Digital Input
Oscillation amplifier element connection or external clock input pin
Notes:
1.
Micro-controller register output or clock switching transition period signal.
2.
128fs, 256fs, 384fs, 512fs, or oscillator amplifier outputs
3.
Other than I
2S mode;
Low: right channel, High: left channel
I
2S mode;
Low: left channel, High: right channel
4.
I/O voltage handling: I or O pins: –0.3 to +3.6V, except annotated pins: –0.3 to +5.5V
5.
To prevent logic circuit latch-up, all power supply levels must be applied or removed simultaneously.



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