WM8803CDTSLASHV datasheet(7/45 Pages) WOLFSON

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WM8803

PP Rev 1.1 September 2003

SYSTEM TIMING REQUIREMENTS

Test Conditions

Ta = 25°C, AVDD = DVDD = 3.3V, AGND = DGND = 0V

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNIT

System Timing Information

RXIN sampling frequency

fFS1

—

195

kHz

RXIN sampling frequency

fFS2

—

108

kHz

XIN clock frequency

fXF1

—

11.2896

—

MHz

XIN clock frequency

fXF2

—

12.2880

—

MHz

XIN clock frequency

fXF3

—

16.9344

—

MHz

XIN clock frequency

fXF4

—

22.5792

—

MHz

XIN clock frequency

fXF5

—

24.5760

—

MHz

XIN clock frequency

fXF6

—

33.8688

—

MHz

CLKOUT clock frequency

FMCK

—

100

MHz

CLKOUT clock jitter

—

200

—

Notes:

1. PLLCK [1:0] = “00”

2. Settings other than PLLCK [1:0] = “00”.

3. XISEL [3:0] = “0000”

4. XISEL [3:0] = “0001”

5. XISEL [3:0] = “0010”

6. XISEL [3:0] = “0100”

7. XISEL [3:0] = “0101”

8. XISEL [3:0] = “0110”

SERIAL INTERFACE TIMING REQUIREMENTS

CLKOUT

BCLK

SDATAO

BDO

LRCLK

UGPI

MBO

TKT

Figure 1 Serial Interface Timing Requirements

WM8803CDT/V 数据表(PDF) 7 Page - Wolfson Microelectronics plc

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