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AD6676EBZ 数据表(PDF) 11 Page - Analog Devices |
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AD6676EBZ 数据表(HTML) 11 Page - Analog Devices |
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11 / 90 page ![]() Data Sheet AD6676 Rev. D | Page 11 of 90 Pin No. Mnemonic Description CMOS Input/Outputs J8, H8, J7, H7 AGC1, AGC2, AGC3, AGC4 AGC Bidirectional Inputs/Outputs. By default, AGC2 and AGC1 are inputs, whereas AGC4 and AGC3 are outputs. If the AGC2 and AGC1 pins are unused, connect them to VSSD via a 100 kΩ resistor. J6 CSB Serial Port Enable Input. Active low. K8 SDIO Serial Port Input/Output. H6 SDO Serial Port Output. K7 SCLK Serial Clock Input. G6 RESETB Active Low Reset Input. This pin places digital logic and SPI registers into a known default state. Leave this pin open if unused because it has an internal pull-up resistor. Power Supplies G8 VDDIO Digital Supply Input for CMOS Input/Outputs (1.8 V to 2.5 V). J1, J2 VDDHSI Digital 1.1 V Supply Input for the High Speed Serial Interface. H3 to H5, J3 to J5 VDDD Digital 1.1 V Supply Input. F4, F5, G2 to G5, H2 VSSD Digital Supply Return. A1 VDDQ Analog 1.1 V Supply Input for the CLK Synthesizer Charge Pump and Dividers. C2, D1, D2 VDDC Analog 1.1 V Supply Input for the CLK Synthesizer VCO. D4, D5 VDDL Analog 1.1 V Supply Input for the ADC. A2, A4, B2, B3, B5, C3, C4, C6, D3, D7 VDD1 Analog 1.1 V Supply Input for the ADC. A5, B6, B7, E7, E8 VDD2 Analog 2.5 V Supply Input. A3, A8, B4, C5, C7, D6, D8, E1 to E6, F1 to F3, F8 VSSA Analog Supply Return. Negative Voltage Regulator F7 VDD2NV Analog 2.5 V Supply Input. G7 VSS2OUT Internal −2.0 V Supply Output. Connect this pin to VSS2IN. F6 VSS2IN Analog −2.0 V Supply Input. Connect this pin to VSS2OUT. |
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