数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

5812-DS01-R 数据表(PDF) 61 Page - Broadcom Corporation.

部件名 5812-DS01-R
功能描述  Security Processor
PDF  84 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  BOARDCOM [Broadcom Corporation.]
网页  http://www.broadcom.com
标志 BOARDCOM - Broadcom Corporation.

5812-DS01-R 数据表(HTML) 61 Page - Broadcom Corporation.

Back Button 5812-DS01-R Datasheet HTML 57Page - Broadcom Corporation. 5812-DS01-R Datasheet HTML 58Page - Broadcom Corporation. 5812-DS01-R Datasheet HTML 59Page - Broadcom Corporation. 5812-DS01-R Datasheet HTML 60Page - Broadcom Corporation. 5812-DS01-R Datasheet HTML 61Page - Broadcom Corporation. 5812-DS01-R Datasheet HTML 62Page - Broadcom Corporation. 5812-DS01-R Datasheet HTML 63Page - Broadcom Corporation. 5812-DS01-R Datasheet HTML 64Page - Broadcom Corporation. 5812-DS01-R Datasheet HTML 65Page - Broadcom Corporation. Next Button
Zoom Inzoom in Zoom Outzoom out
 61 / 84 page
background image
BCM5812
Advance Data Sheet
3/11/03
B roa dcom Co rpo rat ion
Page 53
Signal Definitions
Document
5812-DS01-405-R
SIGNAL DEFINITIONS
Table 17: Signal Definitions
Signal Name
I/O
Description
AD[31:0]
IO
PCI multiplexed Address/Data bus.
PCI_CLK
I
PCI Clock, 33 MHz.
GNT
I
PCI Bus Grant allowing BCM5812 to use the bus.
FRAME
IO
PCI Frame, indicates the beginning and duration of a master transfer.
IRDY
IO
PCI Initiator ready.
TRDY
IO
PCI Target ready.
DEVSEL
IO
PCI Device Select, asserted by an access target.
STOP
IO
PCI Stop, requesting that the current master stop an active transfer.
PERR
IO
PCI Parity Error.
SERR
O
PCI System Error, open drain.
PAR
IO
PCI Parity.
REQ
O
PCI Bus Request.
RST
I
PCI Reset, tri-states all PCI outputs.
INTA
O
PCI interrupt output, open drain.
C/BE[3:0]
IO
PCI Command/Byte Enable, provides PCI bus command and data byte enables.
IDSEL
I
PCI Initialization Device Request, used for PCI configuration cycles.
LOCK
I
PCI lock for atomic operation, must be pulled up to VDDO.
VDDC
Core power pins, must be connected to a 1.8V(core) source.
VDDO
Peripheral power pins, must be connected to a 3.3V(I/O) source.
GND
Core and Peripheral ground pins.
AVCC1
Analog VCC for PLL1, must be connected to a quiet 1.8V source.
AGND1
Analog GND for PLL1.
AVCC2
Analog VCC for PLL2, must be connected to a quiet 1.8V source.
AGND2
Analog GND for PLL2.
VIO
PCI clamp voltage bias. Connect to 3.3V for 3.3V signaling environments.Connect to
5V for 5V signaling environments.
SGND
Clamp ground (substrate ground).
EXPORT
I
EXPORT pin (high = 56-bit DES encryption; disable ARCFOUR; disable AES; low =
3DES strong encryption; enable ARCFOUR; enable AES).
TEST
I
Test pin, must be grounded for regular operation. When TEST is high, all outputs are
tri-stated. It is internally pulled down.
TRST
I
Must be connected to ground for normal operation. Used for boundary scan JTAG
testing. It is internally pulled down.
TMS
I
Test mode select for JTAG boundary scan. Must be connected to VDDO for normal
operation. It is internally pulled up.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com