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ST10F166 数据表(PDF) 23 Page - STMicroelectronics |
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ST10F166 数据表(HTML) 23 Page - STMicroelectronics |
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23 / 62 page ![]() ST10F166 23/62 13 CAPTURE/COMPARE UNIT (CAPCOM) The CAPCOM unit supports generation and control of timing sequences on up to 16 channels, with a maximum resolution of 400 ns. The CAPCOM unit is typically used to handle high speed I/O tasks such as pulse and waveform generation, pulse width modulation (PWM), Digital to Analog (D/A) conversion, software timing, or time re- cording relative to external events. Two 16-bit timers (T0/T1) with reload registers provide two independent time bases for the capture/compare register array. The input clock for the timers is programmable to several prescaled values of the in- ternal system clock, or may be derived from an overflow/underflow of timer T6 in module GPT2. This provides a wide range of variation for the timer period and reso- lution and allows precise adjustment to the application specific requirements. In addi- tion, an external count input for CAPCOM timer T0 allows event scheduling for the capture/compare registers relative to external events. The capture/compare register array contains 16 dual purpose capture/compare reg- isters, each of which may be individually allocated to either CAPCOM timer T0 or T1, and programmed for capture or compare function. Each register has one port pin as- sociated with it which serves as an input pin for triggering the capture function, or as an output pin to indicate the occurrence of a compare event. When a capture/compare register has been selected for capture mode, the current contents of the allocated timer will be latched (’captured’) into the capture/compare register in response to an external event at the port pin which is associated with this register. In addition, a specific interrupt request for this capture/compare register is generated. Either a positive, a negative, or both a positive and a negative external signal transition at the pin can be selected as the triggering event. The contents of all registers which have been selected for one of the five compare modes are continu- ously compared with the contents of the allocated timers. When a match occurs be- tween the timer value and the value in a capture/compare register, specific actions will be taken based on the selected compare mode. |
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