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ST10F166 数据表(PDF) 39 Page - STMicroelectronics |
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ST10F166 数据表(HTML) 39 Page - STMicroelectronics |
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39 / 62 page ![]() ST10F166 39/62 Notes: 1) This specification does not apply to the analog input (Port 5.x) which is currently converted. 3) The maximum current may be drawn while the respective signal line remains inactive. 4) The minimum current must be drawn in order to drive the respective signal line active. 5) This specification is only valid during Reset, or during Hold-mode. 6) Not 100% tested, guaranteed by design characterization. 7) The supply current is a function of the operating frequency. This dependency is illustrated in the figure below. These parameters are tested at VCCmax and 20 MHz CPU clock with all outputs disconnected and all inputs at VIL or VIH. 8) This value is guaranteed also after ESD qualification trials at 25 degrees Pin capacitance 6) (digital inputs/outputs) C IO CC – 10 pF f= 1 MHz T A =25 °C Power supply current I CC – 80 + 5* fCPU mA RSTIN = V IL2 fCPU in [MHz] 7) Idle mode supply current I ID – 35 + 1.5 * fCPU mA RSTIN = V IH1 fCPU in [MHz] 7) Power-down mode supply current I PD TBD TBD µA– V PP read current 6) I PPR –200 µAV PP >VCC V PP write current 6) I PPW –50 mA 1/TCL = 40 MHz 32-bit program- ming V PP =12 V V PP during write/read V PP 11.4 12.6 V Parameter Symbol Limit Values Unit Test Condition min. max. DC Characteristics (Cont’d) |
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