STV0974 datasheet(23/69 Pages) STMICROELECTRONICS

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Functional description

STV0974

23/61

Data Write Register (DW)

The data write register contains the byte to transfer to a camera register. DW can be written only

when SR bit RDY is set.

Data Read Register (DR)

The Data Read Register contains the byte transferred from a camera register. DR is valid only

when SR bit RDY is set.

4.5.4

Indirect registers

The microprocessor interface indirect registers are accessed by the host using an indirect address

base of 0x8FF0 / 0xCFF0 (write / read). Register offsets are listed in

Table 13:

Table 11: Data write register

Bits

Name

Type

Description

[7:0]

Data Byte to write to camera subsystem.

Table 12: Data Read register

Bits

Name

Type

Description

[7:0]

Data Byte read from the camera subsystem.

Table 13: Microprocessor interface indirect register map a b

a. 16-bit values are in little-endian representation, i.e. LSB at lower address.

b. No data polling is required to access the microprocessor interface indirect registers.

Offset

Name

Description

0x00

FIFO

FIFO read register.

0x01

MICR

Microprocessor interface control register

0x02

IMASK

Interrupt mask register

0x03

ICLR

Interrupt clear register

0x04

0x05

FTHR

FIFO threshold register.

0x06

0x07

FCNT

FIFO count register.

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