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STV0974 数据表(PDF) 42 Page - STMicroelectronics |
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STV0974 数据表(HTML) 42 Page - STMicroelectronics |
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42 / 69 page ![]() 42/61 STV0974 Functional description Input / Output Protocol Control 0xA00A R/W S I RDDD.RDDD 0001.0100 Bit [7]: Reserved Bit [6:4]: Input 0: Reserved 1: VisionLink 2-3: Reserved 4: Color bars generator Bit [3]: Reserved Bit [2:0]: Output 0: Reserved 1: Reserved 2: I2C/ITU-R 656 embedded synchro 3: I2C /ITU-R 656 external synchro I2C / JPEG parallel output 4: Microprocessor interface controller / microprocessor interface 5: Reserved a. See Clock input section, for standard external clock frequencies supported. b. The product limitation in derating mode is : 2: Half Speed -> Max I2C clock is 200 kHz 4: Quarter Speed -> Max I2C clock is 100 kHz Table 27: System and status [register group 0] Name Index R/W State code Data type Format default Description |
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