XRT83SL34IV datasheet(18/80 Pages) EXAR

18 / 80 page

XRT83SL34

QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

REV. P1.0.8

PRELIMINARY

EQC4

EQC3

EQC2

EQC1

EQC0

A[4]

A[3]

A[2]

A[1]

A[0]

Equalizer Control Input 4 - Hardware Mode

This pin together with EQC[3:0] are used for controlling the transmit pulse

shaping, transmit line build-out (LBO), receive monitoring and also to select

T1, E1 or J1 Modes of operation. See Table 4 for description of Transmit

Equalizer Control bits.

Equalizer Control Input 3

Equalizer Control Input 2

Equalizer Control Input 1

Equalizer Control Input 0

NOTES:

In Hardware mode all transmit channels share the same pulse

setting controls function.

All channels of an XRT83SL34 must operate at the same clock rate,

either the T1, E1 or J1 modes.

Microprocessor Address bits [4:0] - Host Mode

See “Microprocessor Address Pins - Host mode:” on page 10.

NOTE: Internally pulled “Low” with a 50k

Ω resistor for all channels.

RXTSEL

110

Receiver Termination Select

In Hardware mode, when this pin is “Low” the receive line termination is

determined only by the external resistor. When “High”, the receive termina-

tion is realized by internal resistors or the combination of internal and exter-

nal resistors. These conditions are described in the table below.

NOTE: In Hardware mode all channels share the same RXTSEL control

function.

In Host mode, the RXTSEL_n bits in the channel control registers deter-

mines if the receiver termination is external or internal. However the function

of RXTSEL can be transferred to the Hardware pin by setting the TERCNTL

bit (bit 4) to “1” in the register 66 address hex 0x42.

NOTE: Internally pulled “Low” with a 50k

Ω resistor.

TXTSEL

111

Transmit Termination Select - Hardware Mode

When this pin is “Low” the transmit line termination is determined only by an

external resistor. When “High”, the transmit termination is realized only by

the internal resistor.

NOTES:

This pin is internally pulled "Low" with a 50k

Ω resistor.

In Hardware Mode all channels share the same TXTSEL control

function.

SIGNAL NAME

PIN #TYPE

DESCRIPTION

RXTSEL

RX Termination

External

Internal

TXTSEL

TX Termination

External

Internal

XRT83SL34IV 数据表(PDF) 18 Page - Exar Corporation

XRT83SL34IV 数据表(HTML) 18 Page - Exar Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

数据表下载