XRT83SL34IV datasheet(62/80 Pages) EXAR

62 / 80 page

XRT83SL34

QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

REV. P1.0.8

PRELIMINARY

TABLE 31: MICROPROCESSOR REGISTER #12, BIT DESCRIPTION

0001100

0011100

0101100

0111100

CHANNEL_n

CHANNEL_0

CHANNEL_1

CHANNEL_2

CHANNEL_3

FUNCTION

TYPE

RESET

VALUE

BIT #NAME

Reserved

R/W

D6-D0

B6S5_n -

B0S5_n

Arbitrary Transmit Pulse Shape, Segment 5

The shape of each channel’s transmitted pulse can be made

independently user programmable by selecting “Arbitrary

Pulse” mode in

Table 5. The arbitrary pulse is divided into

eight time segments whose combined duration is equal to one

period of MCLK.

This 7 bit number represents the amplitude of the nth chan-

nel's arbitrary pulse during the fifth time segment. B6S5_n-

B0S5_n is in signed magnitude format with B6S5_n as the

sign bit and B0S5_n as the least significant bit (LSB).

R/W

TABLE 32: MICROPROCESSOR REGISTER #13, BIT DESCRIPTION

0001101

0011101

0101101

0111101

CHANNEL_n

CHANNEL_0

CHANNEL_1

CHANNEL_2

CHANNEL_3

FUNCTION

TYPE

RESET

VALUE

BIT #NAME

Reserved

R/W

D6-D0

B6S6_n -

B0S6_n

Arbitrary Transmit Pulse Shape, Segment 6

The shape of each channel's transmitted pulse can be made

independently user programmable by selecting “Arbitrary

Pulse” mode in

Table 5. The arbitrary pulse is divided into

eight time segments whose combined duration is equal to one

period of MCLK.

This 7 bit number represents the amplitude of the nth chan-

nel's arbitrary pulse during the sixth time segment. B6S6_n-

B0S6_n is in signed magnitude format with B6S6_n as the

sign bit and B0S6_n as the least significant bit (LSB).

R/W

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