XRT83SL34IV datasheet(19/80 Pages) EXAR

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XRT83SL34

QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

PRELIMINARY

REV. P1.0.8

TERSEL0

TERSEL1

113

112

Termination Impedance Select pin 0

Termination Impedance Select pin 1

In the Hardware mode and in the internal termination mode (TXTSEL=”1”

and RXTSEL=”1”), TERSEL[1:0] control the transmit and receive termination

impedance according to the following table.

In the internal termination mode, the receiver termination of each receiver

is realized completely by internal resistors or by the combination of internal

and one fixed external resistor (see description of RXRES[1:0] pins).

In the internal termination mode the transformer ratio of 1:2 and 1:1 is

required for transmitter and receiver respectively with the transmitter output

AC coupled to the transformer.

NOTES:

This pin is internally pulled "Low" with a 50k

Ω resistor.

In Hardware Mode all channels share the same TERSEL control

function.

ICT

120

In-Circuit Testing (active "Low"):

When this pin is tied “Low”, all output pins are forced to a “High” impedance

state for in-circuit testing.

Pulling RESET and ICT pins “Low” simultaneously will put the chip in factory

test mode. This condition should not be permitted during normal operation.

NOTE: Internally pulled “High” with a 50k

Ω resistor.

SIGNAL NAME

PIN #TYPE

DESCRIPTION

100

Ω

110

Ω

120

Ω

Termination

TERSEL1

TERSEL0

XRT83SL34IV 数据表(PDF) 19 Page - Exar Corporation

XRT83SL34IV 数据表(HTML) 19 Page - Exar Corporation

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