SPC58EEX datasheet(152/154 Pages) STMICROELECTRONICS

152 / 154 page

Revision history

SPC58EEx, SPC58NEx

152/154

DS11646 Rev 4

01-Jul-2019

4(cont’)

Section 3.11.3: RC oscillator 16 MHz

– Table 24: Internal RC oscillator electrical specifications: updated Max value

for IFIRC.

Table 26: ADC pin specification:

– Added electrical specification for R20KΩ symbol.

– Added row for symbol “CEXT / SR”.

Table 27: SARn ADC electrical specification:

– column “C” splited and added “D” for IADV_S

– Added electrical specification for R20KΩ symbol.

Table 28: ADC-Comparator electrical specification:

– Set min = 5/fADCK µs for 10-bit ADC mode, min = 2/fADCK for ADC comparator

mode, at symbol tADCSAMPLE.

– column “C” split and added “D” for IADV_S

– Added “ADC comparator mode” condition to the following two parameters:

IADCREFH Min: - and Max: 19.5 µA

IADCREFL Min: - and Max: 20.5 µA

Figure 8: Input equivalent circuit (Fast SARn and SARB channels): Added

parameter “CEXT: external capacitance” and component to scheme.

Section 3.12.4: S/D ADC electrical specification

– Added note.

– Table 29: SDn ADC electrical specification: Table 29: SDn ADC electrical

specification:

– Updated Max value before calibration for VOFFSET, IBIAS, IADV_D.

– Updated footnote “S/D ADC is functional...”

– Added footnote “The absolute value...” for

|δGAIN|.

– updated Vcmrr.

Section 3.12.5: SD ADC filter modes: added this section

Updated Figure 9: LFAST and MSC/DSPI LVDS timing definition

Table 32: LVDS pad startup and receiver electrical characteristics,

Updated footnote #12 starting with “Value valid for LFAST mode...”

with new sentence containing DSPI mode related data.

Section 3.16: Power management: Changed “flash” by “Flash” throughout the

chapter

Section 3.16.1: Power management integration: added sentence “It is

recommended...device itself” for all devices

Table 40: Linear regulator specifications:

– updated values for symbol “

ΔIDDMREG”: Min: added -200, Max: added 200

– For

ΔIDDMREG Added a footnote “Internal schemes must be....”.

Figure 15: SMPS Regulator Mode: Figure updated and footnote added

Table 44: SMPS Regulator specifications:

–For “

ΔIDDSMPS” updated the Min and Max values. Added a table footnote.

– Updated Min and Max values for

ΔIDDSMPS from 100 to 200.

– Changed condition for IDDSMPS.

Section 3.16.1: Power management integration

Table 39: External components integration: added unit to Max value for Cs2 and

Cs1_A.

Table 84. Document revision history (continued)

Date

Revision

Changes

SPC58EEX 数据表(PDF) 152 Page - STMicroelectronics

SPC58EEX 数据表(HTML) 152 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载