AM2434...ALV datasheet(7/280 Pages) TI

7 / 280 page

4 Revision History

Changes from March 15, 2022 to August 29, 2022 (from Revision C (March 2022) to Revision D

(August 2022))

Page

• Removed support claims for USB 3.1 SuperSpeed Host Mode......................................................................... 1

• (Features; Functional Safety-compliant): Updated the "Hardware integrity up to SIL 2 targeted" bullet to

remove "for MCU domain" since the new compliance target includes both MCU and MAIN domains...............1

• (Description): Updated/Changed the "Device Information" table title to now "Package Information"................. 4

• General text cleanup for readability and reference. Including two footnotes that were filtered weird. This topic

is only used by AM243x......................................................................................................................................5

• (Functional Block Diagram): Clarified FSITX and FSIRX instance count........................................................... 5

• (Functional Block Diagram): Added note regarding AM243x SW Build Sheet................................................... 5

• (Functional Block Diagram): Updated PRU_ICSSG block to include ECAP and PWM functionality..................5

• (Functional Block Diagram): Updated 2-Port Gb Ethernet to 3-Port Gb Ethernet and added descriptive

footnote...............................................................................................................................................................5

• (Device Comparison): Merged common rows. Removed Speed Grade K option from AM2431_ALV. Added

Speed Grade K option to AM2432_ALX and AM2431_ALX.............................................................................12

• (Device Comparison): Added a clarification Note that the device feature codes are defined in the Device

Naming Convention section..............................................................................................................................12

• (Related Products): Added Sitara™ microcontrollers and related links.............................................................14

• (ALV FCBGA-N441 Pin Diagram): Changed definition of pin J15 from VDDS_MMC0 (MMC0 PHY IO supply)

to ADC0_REFP (ADC0 Positive Voltage Reference)....................................................................................... 15

• (ALV FCBGA-N441 Pin Diagram): Changed definition of pin J16 from VSS (Ground) to ADC0_REFN (ADC0

Negative Voltage Reference)............................................................................................................................15

• (Pin Attributes Header List): Added "OD" signal type and direction................................................................. 17

• (EQEP Signal Descriptions): Added EQEP debounce footnotes......................................................................20

• (Pin Attributes - ALV Pin J16): VSS (Ground) replaced with ADC0_REFN (ADC0 Negative Voltage

Reference)........................................................................................................................................................ 20

• (Pin Attributes - Pin F18): Removed the "PU/PD" value from the "PULL UP/DOWN TYPE" column since this

pin does not have internal pulls........................................................................................................................ 20

• (GPIO Signal Descriptions): Added note regarding GPIO signals implemented with I2C OD FS voltage buffers

and updated associated signal types from IO to IOD....................................................................................... 20

• (Pin Attributes - ALV Pins A18 B18 - ALX Pins B16 B15 ): Removed UART6_RTS and UART6_CTS. Signals

are implemented with I2C OD FS voltage buffers and do not meet timing requirements.................................20

• (Pin Attributes - Pins C19, A18, B18, E9, and A10): Changed the "PULL" value in the "BALL STATE DURING

RESET RX/TX/PULL" and "BALL STATE AFTER RESET RX/TX/PULL" columns from "Off" to "NA" to help

clarify the I2C Open-drain Fail-safe (I2C OD FS) buffer type does not having internal pulls........................... 20

• (Pin Attributes - Pin G18, J21, G19, K20, J20, J18, J17, H17, H19, H18, G17): Defined values in the "BALL

STATE DURING RESET RX/TX/PULL" and "BALL STATE AFTER RESET RX/TX/PULL" columns for each

MMC0 pin......................................................................................................................................................... 20

• (MMC0 Signal Descriptions): Added MMC0_CALPAD footnote regarding external resistor requirements...... 20

• (Pin Attributes - ALV Pin J15): VDDS_MMC0 (MMC0 PHY IO supply) replaced with ADC0_REFP (ADC0

Positive Voltage Reference)............................................................................................................................. 20

• (Pin Attributes - ALV Pin N21 - ALX Pin M21): BALL STATE AFTER RESET RX/TX/PULL value for the

OSPI0_LBCLKO pin was changed from “On / Off / Off” to “Off / Off / Off” to represent a change implemented

in SR2.0 devices...............................................................................................................................................20

• (MDIO Signal Descriptions): Moved MDIO Signal Descriptions table to CPSW section.................................. 20

• (Signal Descriptions): Added DDR0_CALPAD footnote regarding external resistor requirements.................. 20

• (Pin Attributes): Resolved error preventing some ALV package power pins from populating in associated

tables................................................................................................................................................................ 20

• (EPWM Signal Descriptions): Updated EHRPWM to EPWM in text descriptions............................................ 20

• (GPIO Signal Descriptions): Added GPIO debounce footnotes........................................................................20

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AM2434, AM2432, AM2431

SPRSP65D – APRIL 2021 – REVISED AUGUST 2022

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