AM2434...ALV datasheet(10/280 Pages) TI

10 / 280 page

• (GPMC and NAND Flash — Asynchronous Mode): Removing the TBD maximum value from the "Pulse

duration, output write enable GPMC_WEn valid (tw(wenV))" parameter since a maximum value is not

applicable for this parameter.......................................................................................................................... 182

• (I2C Timing): Removed all timing parameter tables and diagrams, and referenced the Philips I2C-bus™

specification version 2.1 as the source for this information. Added per port descriptions that define each

speed mode supported and included additional information that details exceptions to the I2C specification 188

• (I2C Timing): Added per port descriptions that define each speed mode supported and included additional

information that details exceptions to the I2C specification............................................................................ 188

• (MCSPI - Controller Mode): Inclusive Nomenclature Updates....................................................................... 191

• (MCSPI - Peripheral Mode): Inclusive Nomenclature Updates.......................................................................193

• (MMCSD): Added a new paragraph to the note that explains the meaning of "Tuning" in the MMC0 DLL Delay

Mapping and MMC1 DLL Delay Mapping tables ........................................................................................... 195

• (MMC0 DLL Delay Mapping for All Timing Modes): Added notes to describe the meaning of "NA" and

"Tuning".......................................................................................................................................................... 195

• (MMC1 DLL Delay Mapping for All Timing Modes): Added a note to describe the meaning of "Tuning"....... 201

• (Switching Characteristics for MMC1 – UHS-I SDR12 Mode): Changed "falling" to "rising" in the description of

timing paramter SDR128 and SDR129...........................................................................................................205

• (Switching Characteristics for MMC1 – UHS-I SDR25 Mode): Changed "falling" to "rising" in the description of

timing parameter SDR258 and SDR259.........................................................................................................206

• (OSPI): Updated the entire OSPI timing section.............................................................................................212

• (OSPI Switching Characteristics – PHY Data Training): Defined values for all previously undefined TBD

values............................................................................................................................................................. 213

• (PRU_ICSSG): Updated the note to use the same description used in the PRU_ICSSG Signal Description

note.................................................................................................................................................................223

• (PRU_ICSSG PRU Parallel Capture Mode Timing): Updated minimum pulse duration values for CLOCKIN,

parameters PRPC2 and PRPC3.....................................................................................................................224

• (PRU_ICSSG PRU Switching Characteristics - Shift Out Mode): Corrected errors in notes associated with

variables Z and Y............................................................................................................................................225

• (PRU_ICSSG IEP Timing Conditions): Updated output load capacitance to include a different minimum to

maximum range for EDIO_DATA_OUT.......................................................................................................... 230

• (PRU_ICSSG IEP Timing): Changed the title of the "PRU_ICSSG IEP Timing Requirements – Digital IOs"

table to "PRU_ICSSG IEP Switching Characteristics – Digital IOs" and changed the values defined for

parameter IEPO4............................................................................................................................................230

• (PRU_ICSSM UART Timing Conditions): Changed the minimum and maximum values for Input Slew Rate,

and added a note to the maximum output load capacitance value in the Timing Conditions table................ 232

• (PRU_ICSSG UART Timing): Updated timing parameter values................................................................... 232

• (PRU_ICSSG UART Timing Requirements): Changed the description for each pulse width parameter, added

a note that clarifies the data valid time requirements for each parameter in the Timing Requirements table 232

• (PRU_ICSSG UART Timing Requirements and Switching Characteristics): Updated the timing diagram to

show RXD timing relative to VIL and VIH ........................................................................................................232

• (PRU_ICSSG ECAP Switching Characteristics): Updated the minimum pulse duration values, parameters

PREP3 and PREP4........................................................................................................................................ 233

• (PRU_ICSSG RGMII Timing Conditions): Updated Input Slew Rate and added PCB Connectivity

Requirements................................................................................................................................................. 238

• (UART Timing Conditions): Added a note to the maximum output load capacitance value in the Timing

Conditions table.............................................................................................................................................. 242

• (UART Timing Requirements): Changed the start pulse width parameter description and added a note that

clarifies the data valid time requirements for each parameter in the Timing Requirements table.................. 242

• (UART Switching Characteristics): Added a new row for Programmable baud rate with different limits for Main

Domain and MCU Domain UARTs..................................................................................................................242

• (UART Switching Characteristics): Changed the start pulse width parameter description, removed the CTS

delay parameter, and removed the load capacitance references from the Programmable baud rate parameter

........................................................................................................................................................................242

• (UART Timing Requirements and Switching Characteristics): Updated the timing diagram to remove CTS and

show RXD timing relative to VIL and VIH ........................................................................................................242

AM2434, AM2432, AM2431

SPRSP65D – APRIL 2021 – REVISED AUGUST 2022

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