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STM32F405 数据表(PDF) 89 Page - STMicroelectronics |
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STM32F405 数据表(HTML) 89 Page - STMicroelectronics |
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89 / 204 page  DS8626 Rev 9 89/203 STM32F405xx, STM32F407xx Electrical characteristics Table 22. Typical and maximum current consumption in Sleep mode Symbol Parameter Conditions fHCLK Typ Max(1) Unit TA = 25 °C TA = 85 °C TA = 105 °C IDD Supply current in Sleep mode External clock(2), all peripherals enabled(3) 168 MHz 59 77 84 mA 144 MHz 46 61 67 120 MHz 38 53 60 90 MHz 30 44 51 60 MHz 20 34 41 30 MHz 11 24 31 25 MHz 8 21 28 16 MHz 6 18 25 8 MHz 3 16 23 4 MHz 2 15 22 2 MHz 2 14 21 External clock(2), all peripherals disabled 168 MHz 12 27 35 144 MHz 9 22 29 120 MHz 8 20 28 90 MHz 7 19 26 60 MHz 5 17 24 30 MHz 3 16 23 25 MHz 2 15 22 16 MHz 2 14 21 8 MHz 1 14 21 4 MHz 1 13 21 2 MHz 1 13 21 1. Guaranteed by characterization, tested in production at VDD max and fHCLK max with peripherals enabled. 2. External clock is 4 MHz and PLL is on when fHCLK > 25 MHz. 3. Add an additional power consumption of 1.6 mA per ADC for the analog part. In applications, this consumption occurs only while the ADC is ON (ADON bit is set in the ADC_CR2 register). |
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