STM32F405 datasheet(98/204 Pages) STMICROELECTRONICS

98 / 204 page

Electrical characteristics

STM32F405xx, STM32F407xx

98/203

DS8626 Rev 9

5.3.7

Wakeup time from low-power mode

The wakeup times given in Table 29 is measured on a wakeup phase with a 16 MHz HSI

RC oscillator. The clock source used to wake up the device depends from the current

operating mode:

•

Stop or Standby mode: the clock source is the RC oscillator

•

Sleep mode: the clock source is the clock that was set before entering Sleep mode.

All timings are derived from tests performed under ambient temperature and VDD supply

voltage conditions summarized in Table 14.

APB2

(up to 84 MHz)

SDIO

7.08

7.92

µA/MHz

TIM1

16.79

15.51

TIM8

17.88

16.53

TIM9

7.64

7.28

TIM10

4.89

4.82

TIM11

5.19

4.82

ADC1(5)

4.67

4.58

ADC2(5)

4.67

4.58

ADC3(5)

4.43

4.44

SPI1

1.32

1.39

USART1

3.51

3.72

USART6

3.55

3.75

SYSCFG

0.74

0.56

1. When the I/O compensation cell is ON, IDD typical value increases by 0.22 mA.

2. The BusMatrix is automatically active when at least one master is ON.

3. To enable an I2S peripheral, first set the I2SMOD bit and then the I2SE bit in the SPI_I2SCFGR register.

4. When the DAC is ON and EN1/2 bits are set in DAC_CR register, add an additional power consumption of

0.8 mA per DAC channel for the analog part.

5. When the ADC is ON (ADON bit set in the ADC_CR2 register), add an additional power consumption of

1.6 mA per ADC for the analog part.

Table 28. Peripheral current consumption (continued)

Peripheral

IDD(Typ)(1)

Unit

Scale1

(up t 168 MHz)

Scale2

(up to 144 MHz)

STM32F405 数据表(PDF) 98 Page - STMicroelectronics

STM32F405 数据表(HTML) 98 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载