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STM32F405 数据表(PDF) 107 Page - STMicroelectronics |
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STM32F405 数据表(HTML) 107 Page - STMicroelectronics |
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107 / 204 page  DS8626 Rev 9 107/203 STM32F405xx, STM32F407xx Electrical characteristics With a modulation depth (md) = ±2 % (4 % peak to peak), and PLLN = 240 (in MHz): INCSTEP round 2 15 1 – () 2 240 × × () 100 5 × 250 × () ⁄ [] 126md(quantitazed)% == An amplitude quantization error may be generated because the linear modulation profile is obtained by taking the quantized values (rounded to the nearest integer) of MODPER and INCSTEP. As a result, the achieved modulation depth is quantized. The percentage quantized modulation depth is given by the following formula: mdquantized% MODEPER INCSTEP × 100 × 5 × () 2 15 1 – () PLLN × () ⁄ = As a result: mdquantized% 250 126 × 100 × 5 × () 2 15 1 – () 240 × () ⁄ 2.002%(peak) == Figure 35 and Figure 36 show the main PLL output clock waveforms in center spread and down spread modes, where: F0 is fPLL_OUT nominal. Tmode is the modulation period. md is the modulation depth. Figure 35. PLL output clock waveforms in center spread mode Frequency (PLL_OUT) Time F0 tmode 2xtmode md ai17291 md |
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