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STM32H757AI 数据表(PDF) 230 Page - STMicroelectronics |
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STM32H757AI 数据表(HTML) 230 Page - STMicroelectronics |
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230 / 251 page  Electrical characteristics STM32H757xI 230/251 DS12931 Rev 1 Figure 70. JTAG timing diagram Figure 71. SWD timing diagram Table 131. Dynamics SWD characteristics: Symbol Parameter Conditions Min Typ Max Unit Fpp SWCLK clock frequency 2.7V <VDD< 3.6 V - - 71 MHz 1/tc(SWCLK) 1.62 <VDD< 3.6 V - - 52.5 tisu(SWDIO) SWDIO input setup time - 2.5 - - - tih(SWDIO) SWDIO input hold time - 1 - - - tov(SWDIO) SWDIO output valid time 2.7V <VDD< 3.6 V - 8.5 14 - 1.62 <VDD< 3.6 V -8.5 19 - toh(SWDIO) SWDIO output hold time - 8 - - - MSv40458V1 TDI/TMS TCK TDO tc(TCK) tw(TCKL) t w(TCKH) th(TMS/TDI) tsu(TMS/TDI) tov(TDO) toh(TDO) MSv40459V1 SWDIO SWCLK SWDIO tc(SWCLK) twSWCLKL) tw(SWCLKH) th(SWDIO) tsu(SWDIO) tov(SWDIO) toh(SWDIO) (receive) (transmit) |
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