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TDA4VL...ALZQ1 数据表(PDF) 217 Page - Texas Instruments |
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TDA4VL...ALZQ1 数据表(HTML) 217 Page - Texas Instruments |
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217 / 251 page  RFT_CLK T3 T4 T5 HWn_TSPUSH T1 T2 Figure 7-96. CPTS Timing Requirements 7.10.5.18.2 CPTS Switching Characteristics see Figure 7-97 NO. PARAMETER SOURCE MIN MAX UNIT T6 tw(TS_COMPH) Pulse duration, TS_COMP high 36P - 2(1) ns T7 tw(TS_COMPL) Pulse duration, TS_COMP low 36P - 2(1) ns T8 tw(TS_SYNCH) Pulse duration, TS_SYNC high 36P - 2(1) ns T9 tw(TS_SYNCL) Pulse duration, TS_SYNC low 36P - 2(1) ns T10 tw(SYNC_OUTH) Pulse duration, SYNCn_OUT(2) high TS_SYNC 36P - 2(1) ns TS_GENF 5P - 2(1) ns T11 tw(SYNC_OUTL) Pulse duration, SYNCn_OUT(2) low TS_SYNC 36P - 2(1) ns TS_GENF 5P - 2(1) ns (1) P = functional clock period in ns. (2) n = 0 to 3 in SYNCn_OUT TS_COMP T6 T7 TS_SYNC T8 T9 SYNCn_OUT T10 T11 Figure 7-97. CPTS Switching Characteristics For more information, see Navigator Subsystem (NAVSS) section in Data Movement Architecture (DMA) chapter in the device TRM. 7.10.5.19 OSPI For more details about features and additional description information on the device Octal Serial Peripheral Interface, see the corresponding sections within Signal Descriptions and Detailed Description. Table 7-81 represents OSPI timing conditions. Table 7-81. OSPI Timing Conditions PARAMETER MIN MAX UNIT INPUT CONDITIONS SRI Input slew rate 3.3 V 2 6 V/ns All other modes 1 6 V/ns OUTPUT CONDITIONS CL Output load capacitance All modes 3 10 pF www.ti.com TDA4VE-Q1, TDA4AL-Q1, TDA4VL-Q1 SPRSP62 – DECEMBER 2022 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 217 Product Folder Links: TDA4VE-Q1 TDA4AL-Q1 TDA4VL-Q1 |
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