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KSZ9567RTXI-TR 数据表(PDF) 49 Page - Microchip Technology

部件名 KSZ9567RTXI-TR
功能描述  7-Port Gigabit Ethernet Switch with Audio Video Bridging and Two RGMII/MII/RMII Interfaces
PDF  232 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

KSZ9567RTXI-TR 数据表(HTML) 49 Page - Microchip Technology

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 2017-2019 Microchip Technology Inc.
DS00002329D-page 49
KSZ9567R
Figure 4-8 shows basic organization of the ACL Table. The table has 16 entries, and each entry includes a matching
field, action field and process field. Although these fields are stored together in one table, it is important to note that for
a given table entry, the Matching, Action and Process fields generally do not form an associated group. The one excep-
tion is when the Matching Rule is in Count Mode (MD = 01 and ENB = 00). In that case, the Matching and Action fields
are used in tandem.
4.4.18.4
ACL Interrupts
The ACL filtering functions do not generate interrupts. Interrupts apply only for the Count Mode (MD = 01, ENB = 00).
The Matching Rule can be configured either to timeout if the interval between packets of a specific type (MAC address
and EtherType), or when a set number of these packets are received. There is a separate interrupt for each port. Port
specific interrupt status and masks are located in the Port Interrupt Status Register and Port Interrupt Mask Register.
The top level interrupt registers for each port are in the Global Port Interrupt Status Register and Global Port Interrupt
Mask Register.
4.4.18.5
ACL Registers
Table 4-22 provides a list of ACL related registers.
FIGURE 4-8:
ACL TABLE FORMAT
TABLE 4-22:
ACL REGISTERS
Registers
Description
Port Interrupt Status Register,
Port Interrupt Mask Register
ACL interrupt
Port ACL Access 0 Register through
Port ACL Access F Register,
Port ACL Byte Enable MSB Register,
Port ACL Byte Enable LSB Register,
Port ACL Access Control 0 Register
ACL Table access
Port Priority Control Register
Priority classification
Port Authentication Control Register
ACL enable
F
R
N
MD
[1:0]
ENB
[1:0]
S
/
D
E
Q
MAC ADDRESS [47:0]
TYPE [15:0]
F
R
N
MD
[1:0]
ENB
[1:0]
S
/
D
E
Q
IP ADDRESS [31:0]
IP MASK [31:0]
F
R
N
MD
[1:0]
ENB
[1:0]
S
/
D
E
Q
MAX
PORT
[15:0]
MIN
PORT
[15:0]
Resvd
(5)
PC
[1:0]
PRO
[7:0]
F
M
E
FMSK
[7:0]
FLAG
[7:0]
PM
[1:0]
PM
[1:0]
PM
[1:0]
P
[2:0]
P
[2:0]
P
[2:0]
R
P
E
R
P
E
R
P
E
RP
[2:0]
RP
[2:0]
RP
[2:0]
MM
[1:0]
MM
[1:0]
MM
[1:0]
FORWARD
[# ports]
FORWARD
[# ports]
FORWARD
[# ports]
RULESET
[15:0]
RULESET
[15:0]
RULESET
[15:0]
MATCHING Rule
ACTION Rule
PROCESS
Field
PROCESS
Field
MD = 01
ENB = 00
MD = 10
MD = 11
F
R
N
MD
[1:0]
ENB
[1:0]
S
/
D
E
Q
MAC ADDRESS [47:0]
TYPE [15:0]
COUNT[10:0]
TU
RULESET
[15:0]
MD = 01
ENB != 00
CA unu
sed



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