KSZ9567RTXI-TR datasheet(67/232 Pages) MICROCHIP

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DS00002329D-page 67

KSZ9567R

5.0

DEVICE REGISTERS

The KSZ9567R has a rich set of registers for device management. The registers are accessed by the SPI or I2C inter-

faces, or by in-band management. Alternatively, the MIIM interface can be used to access the PHY registers only. The

MIIM interface cannot access the switch registers.

A 16-bit address is used to access the device registers. This address is split into three hierarchical spaces, as shown

in Figure 5-1. These three spaces are used to designate the port/channel (4-bits), function (page) of the port (4-bits),

and register of function (8-bits). The individual ports are numbered 1 through 7. In the port space, a value of 0 is used

for global registers. Address bit 15 is always 0.

FIGURE 5-1:

= 0x0312

0 = Global

Function Space

(Page)

Port Space

Examples:

N = Port #

= 0xN408

Control,

Status,

Storage,

Etc.

0 = Operation

1 = I/O Interface

2 = PHY

3 = General

4 = Look-up Tables

5 = IEEE 1588 PTP

6-F = Reserved

0 = Operation

1 = PHY

2 = Reserved

3 = RGMII / MII / RMII

4 = MAC

5 = MIB Counters

6 = ACL

7 = Reserved

8 = Ingress – Classification, Policing

9 = Egress – Shaping

A = Queue management

B = Address lookup engine

C = IEEE 1588 PTP

D-F = Reserved

Address

Values of N

are 1 - 7

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