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KSZ9567RTXI-TR 数据表(PDF) 58 Page - Microchip Technology |
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KSZ9567RTXI-TR 数据表(HTML) 58 Page - Microchip Technology |
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58 / 232 page  KSZ9567R DS00002329D-page 58 2017-2019 Microchip Technology Inc. As shown in Figure 4-25, there are two commands: register read and register write. Figure 4-11 and Figure 4-12 show the timing for these two operations. Note 4-8 TA bits are turn-around bits. They are “don't care” bits. 4.11.2 I2C BUS The management interface may be configured to be an I2C slave. In this mode, an I2C master has complete program- ming access to the device's internal control and status registers, including all MIB counters, address lookup tables, VLAN table and ACL table. The 7-bit device address is fixed as 1011_111. Because of the fixed address, only one KSZ9567R may be on the I2C bus at a time. The R/W control bit is then appended as the least significant bit to form these 8-bit address/control words: 1011_1110 <write> 1011_1111 <read> TABLE 4-25: REGISTER ACCESS USING THE SPI INTERFACE SPI Operation Command/Address Phase (SDI pin) TA bits (Note 4-8) Data Phase (SDO or SDI pins) Command Register Address Register Read 011 A23 A22 A21 A20 … A7 A6 A5 A4 A3 A2 A1 A0 XXXXX D7 D6 D5 D4 D3 D2 D1 D0 Register Write 010 A23 A22 A21 A20 … A7 A6 A5 A4 A3 A2 A1 A0 XXXXX D7 D6 D5 D4 D3 D2 D1 D0 Note: The actual device address space is 16 bits (A15 - A0), so the values of address bits A23 - A16 in the SPI command/address phase are “don't care”. FIGURE 4-11: SPI REGISTER READ OPERATION FIGURE 4-12: SPI REGISTER WRITE OPERATION SCS_N SCL SDI (MOSI) SDO (MISO) Read Command Read Address TurnAround D0 D1 D2 D3 D4 D5 D6 D7 TA TA TA TA TA A1 A0 A2 A3 A4 A5 A6 A7 A9 A10 A11 A8 A12 A13 A14 A15 A17 A16 A18 01 1 A20 A19 A22 A21 A23 12 3456789 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Read Data SCS_N SCL SDI (MOSI) SDO (MISO) Write Command Write Address Write Data TurnAround 12 3456789 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 D0 D1 D2 D3 D4 D5 D6 D7 TA TA TA TA TA A1 A0 A2 A3 A4 A5 A6 A7 A9 A10 A11 A8 A12 A13 A14 A15 A17 A16 A18 00 1 A20 A19 A22 A21 A23 |
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