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KSZ9567RTXI-TR 数据表(PDF) 92 Page - Microchip Technology |
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KSZ9567RTXI-TR 数据表(HTML) 92 Page - Microchip Technology |
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92 / 232 page  KSZ9567R DS00002329D-page 92 2017-2019 Microchip Technology Inc. 5.1.4.25 Switch MAC Control 2 Register 5.1.4.26 Switch MAC Control 3 Register 5.1.4.27 Switch MAC Control 4 Register Address: 0x0332 Size: 8 bits Bits Description Type Default 7:4 RESERVED R/W 0x0 3 Null VID Replacement Describes the behavior when a packet is received with a null (zero) VID. 1 = Replace a null VID with the Port Default VID as defined in the Port Default Tag 0 Register and Port Default Tag 1 Register 0 = No replacement of null VID R/W 0b 2:0 Broadcast Storm Protection Rate bits [10:8] The remainder of this fields bits are in the Switch MAC Control 3 Register. Multiply this value by 64 to determine how many bytes of packet data are allowed on an input port in a preset period. The period is 5ms for a 1000Mbps port, 50ms for a 100Mbps port, or 500ms for a 10Mbps. The default is 1%. R/W 000b Address: 0x0333 Size: 8 bits Bits Description Type Default 7:0 Broadcast Storm Protection Rate bits [7:0] The remainder of this fields bits are in the Switch MAC Control 2 Register. Multiply this value by 64 to determine how many bytes of packet data are allowed on an input port in a preset period. The period is 5ms for a 1000Mbps port, 50ms for a 100Mbps port, or 500ms for a 10Mbps. The default is 1%. R/W 0x4A Address: 0x0334 Size: 8 bits Bits Description Type Default 7:1 RESERVED RO 0000_000b 0 Pass Flow Control Packets 1 = Switch will forward 802.3x PAUSE flow control frames. 0 = Switch will filter PAUSE frames. R/W 0b |
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