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KSZ9567RTXI-TR 数据表(PDF) 73 Page - Microchip Technology |
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KSZ9567RTXI-TR 数据表(HTML) 73 Page - Microchip Technology |
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73 / 232 page  2017-2019 Microchip Technology Inc. DS00002329D-page 73 KSZ9567R 5.1.1.8 Global Port Interrupt Status Register This register provides the top level interrupt status for the individual ports. These interrupts are enabled in the Global Port Interrupt Mask Register. Refer to the Port Interrupt Status Register for detailed port interrupt status. Address: 0x0018 - 0x001B Size: 32 bits Bits Description Type Default 31:7 RESERVED RO - 6 Port 7 Interrupt Status 0 = No interrupt 1 = Interrupt request RO 0b 5 Port 6 Interrupt Status 0 = No interrupt 1 = Interrupt request RO 0b 4 Port 5 Interrupt Status 0 = No interrupt 1 = Interrupt request RO 0b 3 Port 4 Interrupt Status 0 = No interrupt 1 = Interrupt request RO 0b 2 Port 3 Interrupt Status 0 = No interrupt 1 = Interrupt request RO 0b 1 Port 2 Interrupt Status 0 = No interrupt 1 = Interrupt request RO 0b 0 Port 1 Interrupt Status 0 = No interrupt 1 = Interrupt request RO 0b |
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