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KSZ9567RTXI-TR 数据表(PDF) 118 Page - Microchip Technology |
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KSZ9567RTXI-TR 数据表(HTML) 118 Page - Microchip Technology |
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118 / 232 page  KSZ9567R DS00002329D-page 118 2017-2019 Microchip Technology Inc. 5.1.6.14 Global PTP Unit Index Register This register is used to index the timestamp unit and trigger unit for accesses to PTP registers in the address range of 0x052C to 0x05B3. The timestamp and trigger units selected in this register will be the units that are read/written when accessing these registers. 5.1.6.15 GPIO Status Monitor 0 Register 7:0 PTP Domain This is the value of the PTP message domain number field. If domain checking is enabled (Global PTP Message Config 2 Register, bit 4), the timestamp capture will be enabled when the receive PTP message domain number matches the value in this field. If domain checking is not enabled, the domain number field will be ignored. R/W 0x00 Address: 0x0520 - 0x0523 Size: 32 bits Bits Description Type Default 31:9 RESERVED RO 0x00000 8 Timestamp Unit Index Pointer (TS_PTR_INDEX) This bit points to the unit/set registers of the timestamp. 1 = Timestamp Unit 1 0 = Timestamp Unit 0 R/W 0b 7:2 RESERVED RO 000000b 1:0 Trigger Unit Index Pointer (TRIGGER_PTR_INDEX) This bit points to the unit/set registers of the trigger. 11 = RESERVED 10 = Trigger Unit 2 01 = Trigger Unit 1 00 = Trigger Unit 0 R/W 00b Address: 0x0524 - 0x0527 Size: 32 bits Bits Description Type Default 31:19 RESERVED RO 0x000 18:16 Event Trigger Output Error (TRIGGER_ERROR) (Bit 18 = Trigger Unit 2, Bit 17 = Trigger Unit 1, Bit 16 = Trigger Unit 0) 1 = The event trigger time is set earlier than the system time clock when the TRIGGER_NOTIFY bit is set to “1” in the Trigger Output Unit Control 1 Regis- ter and will generate an interrupt to the host. This bit can be cleared by reset- ting the TRIGGER_EN bit to “0” in the Timestamp Control and Status Register. 0 = No event trigger error. R/W1C 000b 15:3 RESERVED RO 0x000 Bits Description Type Default |
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