P9415-R Datasheet

© 2021 Renesas Electronics Corporation

50

May 4, 2021

Address

and Bit

Register Field Name

R/W

Default

Value

Function and Description

0x34 [0]

EPT_TYPE_INT

R/W

1

1 = Corresponding interrupt is enabled.

0 = Corresponding interrupt is disabled.

Note: The bit definition in Rx mode and Tx mode is different.

The alignment registers provide information about the positioning of the RX coil relative the TX coil. The AP may use this information to inform

the user of possible reduced power transfer level due to receiver misalignment and suggest repositioning of the RX to improve coupling. The

magnitude of the alignment information depends on the coil sizes and shall not be used for absolute distance measurement.

Table 29. Alignment X-Axis Register (0x38)

Address

and Bit

Register Field Name

R/W

Default

Value

Function and Description

0x38 [7:0]

Align[0]

R

-

8-bit signed integer representing X-axis alignment.

Table 30. Alignment Y-Axis Register (0x39)

Address

and Bit

Register Field Name

R/W

Default

Value

Function and Description

0x39 [7:0]

Align[1]

R

-

8-bit signed integer representing Y-axis alignment.

Table 31. Charge Status Register (0x3A)

Address

and Bit

Register Field Name

R/W

Default

Value

Function and Description

0x3a [7:0]

SSChargeStau

RW

0x00

In RX mode the AP writes this register with the value intended to be sent as payload

to the Charge Status Packet. The FW does not verify or modify the value in any

way. The value should be filled based on the following:

0x0 = Reserved

0x1 = Charge status packet sent with parameter = 1 (1%)

0x2 = Charge status packet send with parameter = 2 (2%)

…

0x64 = Charge status packet send with parameter = 100 (100%)

0x65-0xFE = Reserved

0xFF = No battery charge device or not providing charge status packet

Note: After writing to this register, Send Charge Status bit of Command Register (0x4E) needs to be set for transmission to begin.