P9415-R datasheet(8/62 Pages) RENESAS

8 / 62 page

P9415-R Datasheet

May 4, 2021

2. Pin Descriptions

Table 1.

Pin Descriptions

Pin Number

Name

Type

Description

COM1

High-voltage open-drain modulation FET. Connect a capacitor from AC1 to COM1.

GP1 / Q_MAIN

I/O

General Purpose Push-Pull I/O, referenced to LDO1P8. This pin is used to set the default Q

factor reported in the EPP mode. Default Q factor = Q factor main (based on GP1 voltage) + Q

factor offset (based on GP3 voltage). To use the firmware default Q factor, connect this pin to

GND.

OD0 / SCL

I/O

Clock for I2C Serial Interface with AP (SCL). Connect a pull-up resistor to the system I/O supply.

OD3 / ALIGN_X

I/O

AC input for coil alignment guide in the X-direction. This pin can be left floating if not used.

GP4 /

I2C_ADDR_SEL

I/O

General Purpose Push-Pull I/O, referenced to LDO1P8. The pin is used to select the device I2C

slave address. When this pin is pulled to LDO1P8, the I2C Address is 0x3F and when this pin

pulled to GND, the I2C Address is 0x3B.

COM2

High-voltage open-drain modulation FET. Connect a capacitor from AC2 to COM2.

CMA

High-voltage open-drain modulation FET. Connect a capacitor from AC1 to CMA.

GP0 / PWRGD

I/O

Power good output pin. Connect this pin to the application processor (AP). The P9415-R drives

this pin HIGH to notify the AP host that received power is good in Rx mode. Tx mode does not

use this pin. It can be left floating if not used; do not connect it to the ground.

OD1 / SDA

I/O

Data for I2C Serial Interface with AP (SDA). Connect a pull-up resistor to the system I/O supply.

OD4 / ALIGN_Y

I/O

AC input for coil alignment guide in the Y direction. This pin can be left floating if not used.

CMB

High-voltage open-drain modulation FET. Connect a capacitor from AC2 to CMB.

OD2 / INT

I/O

Interrupt output pin ( INT ). Connect this pin to the application processor (AP) I/O voltage rail

using an external pull-up resistor. The P9415-R drives this pin LOW to notify the AP host of status

changes. This pin can be left floating if not used.

ECLAMP_DRV

Push-Pull output driver for External Power Clamp FET gate control (Connect a resistor from Vrect

to the external FET to GND). This pin can be left floating if not used.

GP2 /

THERMISTOR

I/O

General Purpose Push-Pull I/O, referenced to LDO1P8. This pin can be used to measure coil

temperature with an external thermistor. The P9415-R interrupts the processor when the coil

voltage goes below 0.6V. During the startup phase, this pin is set as a high-impedance. Pull this

pin to 1.8V with a resistor if not used (Thermistor).

LDO5P0

Internal 5V LDO for chip power only (always On when VRECT is powered). Connect a capacitor

to the ground.

P9415-R 数据表(PDF) 8 Page - Renesas Technology Corp

P9415-R 数据表(HTML) 8 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62

数据表下载