P9415-R Datasheet

© 2021 Renesas Electronics Corporation

26

May 4, 2021

8.2.10 Identification and Configuration (ID and Config)

In this phase, the P9415-R sends or expects the following packets:



Identification Packet



Configuration Packet

After the transmission of the Configuration Packet, the P9415-R proceeds to the Negotiation phase.

8.2.11 Negotiation

The Power Receiver negotiates with the Power Transmitter to fine-tune the Power Transfer Contract. For this purpose, the Power Receiver

sends negotiation requests to the Power Transmitter, where the Power Transmitter can grant or deny.

8.2.12 Calibration

The Power Receiver provides its Received Power back to the Power Transmitter.

8.2.13 Power Transfer

In this phase, the P9415-R controls the power transfer by means of the following Control Data Packets:



Control Error Packets



Rectified Power Packet



End Power Transfer Packet

8.2.14 Renegotiation

In this phase, the Power Receiver can make adjustments to the Power Transfer Contract, if required. If necessary, this phase can be aborted

prematurely without changing the Power Transfer Contract.

8.2.15 End of Power Transfer (EPT)

In the event of EPT, the device turns off the LDO only after the AP instructs the P9415-R to continuously send End of Power (EPT) packets

until the transmitter removes the power and the rectifier voltage on the receiver side drops below the UVLO threshold.

8.3 Rx Mode Functions

8.3.1 Synchronous Rectifier

The efficiency of the full-bridge rectifier in the P9415-R is increased by implementing it as a synchronous rectifier. The rectifier comprises four

internally-driven switches that work in a full synchronous mode of operation when the load applied to VOUT is higher than the programmed

threshold value. Below that threshold, the rectifier works in half-synchronous rectification mode. In half-synchronous rectification mode, only

the low-side N-MOSFETs are driven and the high-side N-MOSFETs are forced into diode mode. At power-up, when the voltage is below the

UVLO threshold, the rectifier works by using the body diodes associated with the NMOS transistors. The BST capacitors are used to provide

power to drive the gates of high-side NMOS switches.

8.3.2 Rectifier and VRECT Level

Once VRECT powers up to greater than UVLO, the full-bridge rectifier switches to half synchronous or full synchronous mode (depending on

the loading conditions) to efficiently transfer energy from the transmitter to the load applied to VOUT. The control loop of the P9415-R maintains

the rectifier voltage between 5V and 23.5V, depending on the output current (IOUT) and the programmed output voltage. VRECT must not be

directly loaded.