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P9415-R 数据表(PDF) 24 Page - Renesas Technology Corp

部件名 P9415-R
功能描述  15W Wireless Power Receiver with WattShare™ Mode
PDF  62 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

P9415-R 数据表(HTML) 24 Page - Renesas Technology Corp

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P9415-R Datasheet
© 2021 Renesas Electronics Corporation
24
May 4, 2021
8.2.6 Bit Encoding Scheme
As required by the WPC, the P9415-R uses a differential bi-phase encoding scheme to modulate data bits onto the power signal. A clock
frequency of 2kHz is used for this purpose. A logic ONE bit is encoded using two narrow transitions, whereas a logic ZERO bit is encoded using
two wider transitions as shown below:
Figure 18. Bit Encoding Scheme
tCLK
ONE
ZERO
ONE
ZERO
ONE
ONE
ZERO
ZERO
Each byte in the communication packet comprises 11 bits in an asynchronous serial format, as shown below:
Figure 19. Byte Encoding Scheme
Start
Stop
Parity
b0
1
2
3
4
5
6
7
b
b
b
b
b
b
b
Each byte has a start bit, 8 data bits, a parity bit, and a single stop bit.
8.2.7 System Feedback Control
The P9415-R is fully compatible with WPC (latest specification) and has all necessary circuitry to communicate with the base station or with a
receiver via WPC communication packets. The overall WPC system behavior between the transmitter and the receiver follows the state machine
in Figure 20.



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