STM32U535NET3QTR datasheet(133/278 Pages) STMICROELECTRONICS

部件名	STM32U535NET3QTR

功能描述	Ultra-low-power Arm® Cortex®-M33 MCUTrustZone®FPU,240 DMIPS, up to 512 KB flash memory, 274 KB SRAM

PDF	278 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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133 / 278 page

DS14217 Rev 1

133/278

STM32U535xx

Electrical characteristics

253

5.3.2

Operating conditions at power-up/power-down

The parameters given in the table below are derived from tests performed under the

ambient temperature condition summarized in Table 32.

5.3.3

Embedded reset and power control block characteristics

The parameters given in the table below are derived from tests performed under the

ambient temperature conditions summarized in Table 32.

6. The I/Os powered by VSW are:

- PC13, PC14, PC15 when VDD is present.

- PC13, PC14, PC15, and all FT_t I/Os in VBAT mode.

7. In low-power dissipation state, TA can be extended to this range as long as TJ does not exceed TJ max.

Table 33. Operating conditions at power-up/power-down

Symbol

Parameter

Conditions

Min

Max

Unit

tVDD

VDD rise-time rate

∞

µs/V

VDD fall-time rate

ULPMEN = 0 (default value)

∞

Standby mode, BOR level 0 selected

with ULPMEN = 1

250

∞

ms/V

Table 34. Embedded reset and power control block characteristics(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

tRSTTEMPO(2)

Reset temporization after BOR0 is

detected

VDD rising

900

μs

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