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STM32U535NET3QTR 数据表(PDF) 24 Page - STMicroelectronics

部件名 STM32U535NET3QTR
功能描述  Ultra-low-power Arm® Cortex®-M33 MCUTrustZone®FPU,240 DMIPS, up to 512 KB flash memory, 274 KB SRAM
PDF  278 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32U535NET3QTR 数据表(HTML) 24 Page - STMicroelectronics

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Functional overview
STM32U535xx
24/278
DS14217 Rev 1
Backup registers
1
Yes
Yes
N/A
No
No
N/A(7)
2
Yes
Yes
N/A
N/A
N/A
N/A
SRAM2/backup
RAM
1
Yes
Yes
N/A
No
No
N/A(8)
2
Yes
Yes
N/A
N/A
N/A
N/A
1. When the protection level 2 is active, the debug port, the boot from RAM and the boot from system memory are disabled.
2. The system memory is only read-accessible, whatever the protection level (0, 1 or 2) and execution mode.
3. Option bytes are only accessible through the flash memory registers and OPSTRT bit.
4. The flash main memory is erased when the RDP option byte changes from level 1 to level 0.
5. SWAP_BANK option bit can be modified.
6. OTP can only be written once.
7. The backup registers are erased when RDP changes from level 1 to level 0.
8. All SRAMs are erased when RDP changes from level 1 to level 0.
Table 3. Access status versus protection level and execution modes when TZEN = 0 (continued)
Area
RDP
level
User execution
(boot from flash memory)
Debug/boot from RAM/ bootloader(1)
Read
Write
Erase
Read
Write
Erase
Table 4. Access status versus protection level and execution modes when TZEN = 1
Area
RDP
level
User execution
(boot from flash memory)
Debug/ bootloader(1)
Read
Write
Erase
Read
Write
Erase
Flash main memory
0.5
Yes
Yes
Yes
Yes(2)
Yes(2)
Yes(2)
1
Yes
Yes
Yes
No
No
No(5)
2
Yes
Yes
Yes
N/A
N/A
N/A
System memory (3)
0.5
Yes
No
No
Yes
No
No
1
Yes
No
No
Yes
No
No
2
Yes
No
No
N/A
N/A
N/A
Option bytes(4)
0.5
Yes
Yes(5)
N/A
Yes
Yes (5)
N/A
1Yes
Yes(5)
N/A
Yes
Yes(5)
N/A
2Yes
No(6)
N/A
N/A
N/A
N/A
OTP
0.5
Yes
Yes(7)
N/A
Yes
Yes(7)
N/A
1Yes
Yes(7)
N/A
Yes
Yes(7)
N/A
2Yes
Yes(7)
N/A
N/A
N/A
N/A



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