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STM32U535NET3QTR 数据表(PDF) 41 Page - STMicroelectronics |
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STM32U535NET3QTR 数据表(HTML) 41 Page - STMicroelectronics |
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41 / 278 page ![]() DS14217 Rev 1 41/278 STM32U535xx Functional overview 84 Table 10. Functionalities depending on the working mode(1) Peripheral Run Sleep Stop 0/1 Stop 2 Stop 3 Standby Shutdown VBAT - - - - - CPU Y - - -- -- -- -- -- Flash memory (512 Kbytes) O(2) O(2) - -- -- -- -- -- SRAM1 (192 Kbytes) Y(3)(4) Y(3)(4) O(5) -O(5) -O(5) -- -- -- SRAM2 (64 Kbytes) Y(3)(4) Y(3)(4) O(5) O(6) O(5) -O(5) - O (7) -- -- SRAM4 (16 Kbytes) Y(3)(4) Y(3)(4) O(5) -O(5) -O(5) -- -- -- BKPSRAM O(4) O(4) O O(6) O O O - O OCTOSPI1 O O - -- -- -- -- -- Backup registers Y Y Y -Y -Y -Y -Y -Y BOR (Brownout reset) Y Y Y YY YY YY Y- -- PVD (programmable voltage detector) OO O OO O- -- -- -- Peripheral voltage monitor OO O OO O- -- -- -- GPDMA1 O O O O(8) - -- -- -- -- LPDMA1 O O O O(9) O O(9) - -- -- -- HSI16 (high-speed internal) OO (10) - (10) -- -- -- -- HSI48 oscillator O O - - - - - -- -- -- HSE (high-speed external) OO - -- -- -- -- -- LSI (low-speed internal) OO O -O -O -O -- -O LSE (low-speed external) OO O -O -O -O -O -O MSIS and MSIK (multi-speed internal) OO (10) - (10) -- -- -- -- CSS (clock security system) OO - -- -- -- -- -- Clock security system on LSE OO O OO OO OO OO OO Backup domain voltage and temperature monitoring OO O OO OO OO OO OO |
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