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STM32U535NET3QTR 数据表(PDF) 27 Page - STMicroelectronics |
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STM32U535NET3QTR 数据表(HTML) 27 Page - STMicroelectronics |
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27 / 278 page ![]() DS14217 Rev 1 27/278 STM32U535xx Functional overview 84 The table below shows an example of typical SAU region configuration based on IDAU regions. The user can split and choose the secure, nonsecure or NSC regions for external memories as needed. 3.6.1 TrustZone peripheral classification When the TrustZone security is active, a peripheral can be either securable or TrustZone-aware type as follows: • securable: peripheral protected by an AHB/APB firewall gate that is controlled from TZSC to define security properties • TrustZone-aware: peripheral connected directly to AHB or APB bus and implementing a specific TrustZone behavior such as a subset of registers being secure 3.6.2 Default TrustZone security state The default system security state is detailed below: • CPU: – Cortex-M33 is in secure state after reset. The boot address must be in secure address. Table 5. Example of memory map security attribution versus SAU configuration regions Region description Address range IDAU security attribution SAU security attribution typical configuration Final security attribution Code - external memories 0x0000 0000 0x07FF FFFF Nonsecure Secure or nonsecure or NSC(1) Secure or nonsecure or NSC Code - Flash and SRAM 0x0800 0000 0x0BFF FFFF Nonsecure Nonsecure Nonsecure 0x0C00 0000 0x0FFF FFFF NSC Secure or NSC Secure or NSC Code - external memories 0x1000 0000 0x17FF FFFF Nonsecure Nonsecure 0x1800 0000 0x1FFF FFFF SRAM 0x2000 0000 0x2FFF FFFF Nonsecure 0x3000 0000 0x3FFF FFFF NSC Secure or NSC Secure or NSC Peripherals 0x4000 0000 0x4FFF FFFF Nonsecure Nonsecure Nonsecure 0x5000 0000 0x5FFF FFFF NSC Secure or NSC Secure or NSC External memories 0x6000 0000 0xDFFF FFFF Nonsecure Secure or nonsecure or NSC Secure or nonsecure or NSC 1. NSC = nonsecure callable. |
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