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ADV7393 数据表(PDF) 27 Page - Analog Devices

部件名 ADV7393
功能描述  Low Power, Chip Scale 10-Bit SD/HD Video Encoder
PDF  96 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADV7393 数据表(HTML) 27 Page - Analog Devices

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ADV7390/ADV7391/ADV7392/ADV7393
Rev. 0 | Page 27 of 96
Table 15. Register 0x0B to Register 0x17
SR7 to
Bit Number
Reset
SR0
Register
Bit Description
7
6
5
4
3
2
1
0
Register Setting
Value
0
0
0
0
0
0
0
0
0%
0x00
0
0
0
0
0
0
0
1
+0.018%
0
0
0
0
0
0
1
0
+0.036%
…
…
…
…
…
…
…
…
…
0
0
1
1
1
1
1
1
+7.382%
Positive Gain to DAC Output Voltage.
0
1
0
0
0
0
0
0
+7.5%
1
1
0
0
0
0
0
0
−7.5%
1
1
0
0
0
0
0
1
−7.382%
1
0
0
0
0
0
1
0
−7.364%
…
…
…
…
…
…
…
…
…
0x0B
DAC 1, DAC 2,
DAC 3 Output
Level
Negative Gain to DAC Output
Voltage.
1
1
1
1
1
1
1
1
−0.018%
0
DAC 1 low power disabled
0x00
DAC 1 Low Power Mode.
1
DAC 1 low power enabled
0
DAC 2 low power disabled
DAC 2 Low Power Mode.
1
DAC 2 low power enabled
0
DAC 3 low power disabled
DAC 3 Low Power Mode.
1
DAC 3 low power enabled
0
SD = 16×, ED = 8×
SD/ED Oversample Rate Select.
1
SD = 8×, ED = 4×
0x0D
DAC Power
Mode
Reserved.
0
0
0
0
DAC 1 Cable Detect.
0
Cable detected on DAC 1
0x00
Read Only.
1
DAC 1 unconnected
DAC 2 Cable Detect.
0
Cable detected on DAC 2
Read Only.
1
DAC 2 unconnected
Reserved.
0
0
0
DAC auto power-down
disable
Unconnected DAC auto power-down.
1
DAC auto power-down
enable
0x10
Cable Detection
Reserved.
0
0
0
P[7:0] Readback (ADV7390/ADV7391).
0x13
Pixel Port
Readback A1
P[15:8] Readback (ADV7392/ADV7393).
x
x
x
x
x
x
x
x
Read only
0xXX
0x14
Pixel Port
Readback B1
P[7:0] Readback (ADV7392/ADV7393).
x
x
x
x
x
x
x
x
Read only
0xXX
Reserved.
x
x
x
0xXX
VSYNC Readback.
x
HSYNC Readback.
x
SFL/MISO Readback.
x
0x16
Control Port
Readback1
Reserved.
x
x
Read only
Reserved.
0
0x00
0
Software Reset.
1
Writing a 1 resets the
device; this is a self-
clearing bit
0x17
Software Reset
Reserved.
0
0
0
0
0
0
1 For correct operation, Subaddress 0x01[6:4] must equal the default value of 000.



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