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ADV7393 数据表(PDF) 28 Page - Analog Devices

部件名 ADV7393
功能描述  Low Power, Chip Scale 10-Bit SD/HD Video Encoder
PDF  96 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADV7393 数据表(HTML) 28 Page - Analog Devices

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ADV7390/ADV7391/ADV7392/ADV7393
Rev. 0 | Page 28 of 96
Table 16. Register 0x30
SR7 to
Bit Number
Reset
SR0
Register
Bit Description
7
6
5
4
3
2
1
0
Register Setting
Note
Value
0
0
EIA-770.2 output
EIA-770.3 output
ED
HD
0x00
0
1
EIA-770.1 output
1
0
Output levels for full
input range
ED/HD Output Standard.
1
1
Reserved
0
External HSYNC, VSYNC
and field inputs1
ED/HD Input
Synchronization Format.
1
Embedded EAV/SAV
codes
0
0
0
0
0
SMPTE 293M, ITU-BT.1358
525p @ 59.94 Hz
0
0
0
0
1
Nonstandard timing mode
0
0
0
1
0
BTA-1004, ITU-BT.1362
525p @ 59.94 Hz
0
0
0
1
1
ITU-BT.1358
625p @ 50 Hz
0
0
1
0
0
ITU-BT.1362
625p @ 50 Hz
0
0
1
0
1
SMPTE 296M-1,
SMPTE 274M-2
720p @
60 Hz/59.94 Hz
0
0
1
1
0
SMPTE 296M-3
720p @ 50 Hz
0
0
1
1
1
SMPTE 296M-4,
SMPTE 274M-5
720p @
30 Hz/29.97 Hz
0
1
0
0
0
SMPTE 296M-6
720p @ 25 Hz
0
1
0
0
1
SMPTE 296M-7,
SMPTE 296M-8
720p @
24 Hz/23.98 Hz
0
1
0
1
0
SMPTE 240M
1035i @
60 Hz/59.94 Hz
0
1
0
1
1
Reserved
0
1
1
0
0
Reserved
0
1
1
0
1
SMPTE 274M-4,
SMPTE 274M-5
1080i @
30 Hz/29.97 Hz
0
1
1
1
0
SMPTE 274M-6
1080i @ 25 Hz
0
1
1
1
1
SMPTE 274M-7,
SMPTE 274M-8
1080p @
30 Hz/29.97 Hz
1
0
0
0
0
SMPTE 274M-9
1080p @ 25 Hz
1
0
0
0
1
SMPTE 274M-10,
SMPTE 274M-11
1080p @
24 Hz/23.98 Hz
1
0
0
1
0
ITU-R BT.709-5
1080Psf @ 24 Hz
0x30
ED/HD Mode
Register 1
ED/HD Input Mode.
10011 to 11111
Reserved
1 Synchronization can be controlled with a combination of either HSYNC and VSYNC inputs or HSYNC and field inputs, depending on Subaddress 0x34, Bit 6.



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