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ADV7393 数据表(PDF) 30 Page - Analog Devices

部件名 ADV7393
功能描述  Low Power, Chip Scale 10-Bit SD/HD Video Encoder
PDF  96 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADV7393 数据表(HTML) 30 Page - Analog Devices

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ADV7390/ADV7391/ADV7392/ADV7393
Rev. 0 | Page 30 of 96
Table 18. Register 0x34 to Register 0x38
SR7 to
Bit Number
Reset
SR0
Register
Bit Description
7
6
5
4
3
2
1
0
Register Setting
Value
0
Internal ED/HD timing counters enabled
0x48
ED/HD Timing Reset.
1
Resets the internal ED/HD timing counters
0
ED/HD HSYNC Control.1
1
HSYNC output control (refer to
Table 50)
0
ED/HD VSYNC Control.1
1
VSYNC output control (refer to
Table 51)
Reserved.
1
0
ED Macrovision disabled
ED Macrovision Enable.2
1
ED Macrovision enabled
Reserved.
0
0 must be written to this bit
0
0 = Field input
ED/HD VSYNC Input/Field
Input.
1
1 = VSYNC input
0
Update field/line counter
0x34
ED/HD Mode
Register 5
ED/HD Horizontal/Vertical
Counter Mode.3
1
Field/line counter free running
Reserved.
0
0x00
Reserved.
0
0
Disabled
ED/HD Sync on PrPb.
1
Enabled
0
DAC 2 = Pb, DAC 3 = Pr
ED/HD Color DAC Swap.
1
DAC 2 = Pr, DAC 3 = Pb
0
Gamma Correction Curve A
ED/HD Gamma Correction
Curve Select.
1
Gamma Correction Curve B
0
Disabled
ED/HD Gamma
Correction Enable.
1
Enabled
0
Mode A
ED/HD Adaptive
Filter Mode.
1
Mode B
0
Disabled
0x35
ED/HD Mode
Register 6
ED/HD Adaptive
Filter Enable.
1
Enabled
0x36
ED/HD Y Level4
ED/HD Test Pattern Y Level.
x
x
x
x
x
x
x
x
Y level value
0xA0
0x37
ED/HD Cr Level4
ED/HD Test Pattern Cr Level.
x
x
x
x
x
x
x
x
Cr level value
0x80
0x38
ED/HD Cb Level4
ED/HD Test Pattern Cb Level.
x
x
x
x
x
x
x
x
Cb level value
0x80
1 Used in conjunction with ED/HD sync output enable in Subaddress 0x02, Bit 7 = 1.
2 Applies to the ADV7390 and ADV7392 only.
3 When set to 0, the horizontal/vertical counters automatically wrap around at the end of the line/field/frame of the selected standard. When set to 1, the
horizontal/vertical counters are free running and wrap around when external sync signals indicate to do so.
4 For use with ED/HD internal test patterns only (Subaddress 0x31, Bit 2 = 1).



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