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AD9981/PCB 数据表(PDF) 16 Page - Analog Devices |
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AD9981/PCB 数据表(HTML) 16 Page - Analog Devices |
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16 / 44 page ![]() AD9981 Preliminary Technical Data Rev. 0 | Page 16 of 44 ACTIVITY DETECT AD9981 SYNC PROCESSOR PLL CLOCK GENERATOR HSYNC MUX COAST MUX EQ PULSE FILTER HSYNC0 HSYNC1 SOGOUT VSYNCOUT VSYNCOUT VSYNC HSYNC COAST DATACK SOGIN0 SOGIN1 COAST POLARITY DETECT CHANNEL SELECT HSYNC SELECT FILTERED, RECONSTRUCTED HSYNC ACTIVITY DETECT POLARITY DETECT ACTIVITY DETECT VSYNC0 VSYNC1 POLARITY DETECT ACTIVITY DETECT POLARITY DETECT ACTIVITY DETECT SYNC SLICER HSYNC/VSYNC ACTIVITY DETECT SET POLARITY SET POLARITY SET POLARITY H/V COUNT R26, R27 Figure 8. Sync Processing Block Diagram Sync Processing The inputs of the sync processing section of the AD9981 are combinations of digital Hsyncs and Vsyncs, analog sync-on- green, or sync-on-Y signals, and an optional external Coast signal. From these signals it generates a precise, jitter-free (9% or less at 95 MHz) clock from its PLL; an odd-/even-field signal; Hsync and Vsync out signals; a count of Hsyncs per Vsync; and a programmable SOG output. The main sync processing blocks are the sync slicer, sync separator, Hsync filter, Hsync regenerator, Vsync filter, and Coast generator. The sync slicer extracts the sync signal from the green graphics or luminance video signal that is connected to the SOGIN input and outputs a digital composite sync. The sync separator’s task is to extract Vsync from the composite sync signal, which can come from either the sync slicer or the Hsync input. The Hsync filter is used to eliminate any extraneous pulses from the Hsync or SOGIN inputs, outputting a clean, low-jitter signal that is appropriate for mode detection and clock generation. The Hsync regenerator is used to recreate a clean, although not low jitter, Hsync signal that can be used for mode detection and counting Hsyncs per Vsync. The Vsync filter is used to elimi- nate spurious Vsyncs, maintain a stable timing relationship between the Vsync and Hsync output signals, and generate the odd/even field output. The Coast generator creates a robust Coast signal that allows the PLL to maintain its frequency in the absence of Hsync pulses. Sync Slicer The purpose of the sync slicer is to extract the sync signal from the green graphics or luminance video signal that is connected to the SOGIN input. The sync signal is extracted in a two step process. First, the SOG input is clamped to its negative peak, (typically 0.3 V below the black level). Next, the signal goes to a comparator with a variable trigger level (set by Register 0x1D, Bits [7:3]), but nominally 0.128 V above the clamped level. The sync slicer output is a digital composite sync signal containing both Hsync and Vsync information (see Figure 9). |
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