CS53L21 datasheet(49/66 Pages) CIRRUS

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DS700PP1

CS53L21

SPE Soft Ramp and Zero Cross Control (SPE_SZC[1:0])

Default = 10

00 - Immediate Change

01 - Zero Cross

10 - Soft Ramp

11 - Soft Ramp on Zero Crossings

Function:

Note: The SPE_ENABLE bits in reg09h must be set to 1 to enable function control

Immediate Change

When Immediate Change is selected all volume-level changes will take effect immediately in one step.

Zero Cross

This setting dictates that signal-level changes, either by gain changes, attenuation changes or muting, will

occur on a signal zero crossing to minimize audible artifacts. The requested level change will occur after a

timeout period between 1024 and 2048 sample periods (21.3 ms to 42.7 ms at 48 kHz sample rate) if the

signal does not encounter a zero crossing. The zero cross function is independently monitored and imple-

mented for each channel. Note: The LIM_SRDIS bit is ignored.

Soft Ramp

Soft Ramp allows level changes, either by gain changes, attenuation changes or muting, to be implemented

by incrementally ramping, in 1/8 dB steps, from the current level to the new level at a rate of 0.5 dB per 4

left/right clock periods.

Soft Ramp on Zero Crossing

This setting dictates that signal-level changes, either by gain changes, attenuation changes or muting, will

occur in 1/8 dB steps and be implemented on a signal zero crossing. The 1/8 dB level change will occur

after a timeout period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sample rate) if

the signal does not encounter a zero crossing. The zero cross function is independently monitored and im-

plemented for each channel. Note: The LIM_SRDIS bit is ignored.

6.9

ALCX & PGAX Control: ALCA, PGAA (Address 0Ah) & ALCB, PGAB (Address 0Bh)

ALCX Soft Ramp Disable (ALCX_SRDIS)

Default: 0

0 - Off

1 - On

Function:

Overrides the SOFTx bit setting for the ADC. When this bit is set, the ALC attack rate in the PGA will not be

dictated by the soft ramp setting. ALC volume-level changes will take effect in one step.

432

ALCX_SRDIS ALCX_ZCDIS

Reserved

PGAX_VOL4

PGAX_VOL3

PGAX_VOL2

PGAX_VOL1

PGAX_VOL0

CS53L21 数据表(PDF) 49 Page - Cirrus Logic

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