CS53L21 datasheet(44/66 Pages) CIRRUS

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DS700PP1

CS53L21

ADC I²S or Left-Justified (ADC_I²S/LJ)

Default: 0

0 - Left-Justified

1 - I²S

Function:

Selects either the I²S or Left-Justified digital interface format for the data on SDOUT. The required relation-

ship between the Left/Right clock, serial clock and serial data is defined by the Digital Interface Format and

the options are detailed in this section “Digital Interface Formats” on page 31.

Digital Mix (DIGMIX)

Default: 0

Function:

Routes the ADC outputs to the serial port SDOUT pin. DIGMIX selects either “raw” ADC data or SPE pro-

cessed ADC data to SDOUT. Note: If DIGMIX = 1, SPE_ENABLE must be 1 for the SPE to be functional.

Microphone Mix (MICMIX)

Default: 0

0 - Disabled; No Mix: Left/Right Channel to ADC serial port, SDOUT.

1 - Enabled; Mix: Differential mix ((A-B)/2)to ADC serial port, SDOUT.

Function:

Selects between the ADC stereo mix or a differential mix of analog inputs A and B.

6.5

MIC Control (Address 05h)

ADC Single Volume Control (ADC_SNGVOL)

Default: 0

0 - Disabled

1 - Enabled

Function:

The individual PGA Volume (PGAx_VOLx) and ADC channel attenuation (ADCx_ATTx) levels as well as

the ALC A and B enable (ALC_ENx) are independently controlled by their respective control registers when

this function is disabled. When enabled, the volume on both channels is determined by the ADCA Attenuator

Control register, or the PGAA Control register, and the ADCB Attenuator and PGAB Control registers are

ignored. The ALC enable control for channel B is controlled by the ALC A enable when the ADC_SNGVOL

bit is enabled and the ALC_ENB control register is ignored.

DIGMIX

SPE_ENABLE

Mix Selected

ADC data to ADC serial port, SDOUT data.

Reserved

SPE Processed ADC data to ADC serial port, SDOUT data.

ADC_SNGVOL

ADCB_DBOOST ADCA_DBOOST MICBIAS_SEL MICBIAS_LVL1 MICBIAS_LVL0

MICB_BOOST MICA_BOOST

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