CS53L21 datasheet(20/66 Pages) CIRRUS

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DS700PP1

CS53L21

4. APPLICATIONS

4.1

Overview

4.1.1

Architecture

The CS53L21 is a highly integrated, low power, 24-bit audio A/D. The ADC operates at 64Fs, where Fs

is equal to the system sample rate. The different clock rates maximize power savings while maintaining

high performance. The A/D operates in one of four sample rate speed modes: Quarter, Half, Single and

Double. It accepts and is capable of generating serial port clocks (SCLK, LRCK) derived from an input

Master Clock (MCLK).

4.1.2

Line & MIC Inputs

The analog input portion of the A/D allows selection from and configuration of multiple combinations of

stereo and microphone (MIC) sources. Six line inputs with configuration for two MIC inputs (or one MIC

input with common mode rejection), two MIC bias outputs and independent channel control (including a

high-pass filter disable function) are available. A Programmable Gain Amplifier (PGA), MIC boost, and Au-

tomatic Level Control (ALC), with noise gate settings, provide analog gain and adjustment. Digital volume

controls, including gain, boost, attenuation and inversion are also available.

4.1.3

Signal Processing Engine

The ADC data has independent volume controls and mixing functions such as mono mixes and left/right

channel swaps.

4.1.4

Device Control (Hardware or Software Mode)

In Software Mode, all functions and features may be controlled via a two-wire I²C or three-wire SPI control

port interface. In Hardware Mode, a limited feature set may be controlled via stand-alone control pins.

4.1.5

Power Management

Two Software Mode control registers provide independent power-down control of the ADC, PGA, MIC pre-

amp and MIC bias, allowing operation in select applications with minimal power consumption.

CS53L21 数据表(PDF) 20 Page - Cirrus Logic