CC2500-RTR1 datasheet(64/84 Pages) TI

64 / 84 page

CC2500

PRELIMINARY Data Sheet (Rev.1.2)

SWRS040A

Page 64 of 83

0x16: MCSM2 – Main Radio Control State Machine configuration

Bit

Field Name

Reset

R/W

Description

7:5

Reserved

RX_TIME_RSSI

R/W

Direct RX termination based on RSSI measurement (carrier

sense).

RX_TIME_QUAL

R/W

When the RX_TIME timer expires the chip stays in RX mode if

sync word is found when RX_TIME_QUAL=0, or either sync

word is found or PQT is set when RX_TIME_QUAL=1.

2:0

RX_TIME[2:0]

7 (111)

R/W

Timeout for sync word search in RX. The timeout is relative to

the programmed EVENT0 timeout, which means that the duty

cycle can be set in wake-on-radio (WOR) mode.

The RX timeout in µs is given by EVENT0·C(RX_TIME, WOR_RES), where C is given by the table below (XOSC =

26 MHz):

RX_TIME[2:0]

WOR_RES = 0

WOR_RES = 1

WOR_RES = 2

WOR_RES = 3

0 (000)

3.6058

18.0288

32.4519

46.8750

1 (001)

1.8029

9.0144

16.2260

23.4375

2 (010)

0.9014

4.5072

8.1130

11.7188

3 (011)

0.4507

2.2536

4.0565

5.8594

4 (100)

0.2254

1.1268

2.0282

2.9297

5 (101)

0.1127

0.5634

1.0141

1.4648

6 (110)

0.0563

0.2817

0.5071

0.7324

7 (111)

Until end of packet

As an example, EVENT0 = 34666, WOR_RES = 0 and RX_TIME = 6 corresponds to 1.96 ms RX timeout, 1 s

polling interval and 0.195% duty cycle. Note that WOR_RES should be 0 or 1 when using WOR.

The duty cycle is approximated by:

RX_TIME[2:0]

WOR_RES = 0

WOR_RES = 1

0 (000)

12.50%

1.95%

1 (001)

6.250%

9765 ppm

2 (010)

3.125%

4883 ppm

3 (011)

1.563%

2441 ppm

4 (100)

0.781%

5 (101)

0.391%

6 (110)

0.195%

7 (111)

Until end of packet

Note that the RC oscillator must be enabled in order to use setting 0-6, because the timeout counts RC oscillator

periods. WOR mode does not need to be enabled.

The timeout counter resolution is limited: With RX_TIME=0, the timeout count is given by the 13 MSBs of EVENT0,

decreasing to the 7 MSBs of EVENT0 with RX_TIME=6.

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