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UJA1069 数据表(PDF) 7 Page - NXP Semiconductors

部件名 UJA1069
功能描述  LIN fail-safe system basis chip
PDF  64 Pages
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

UJA1069 数据表(HTML) 7 Page - NXP Semiconductors

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UJA1069_2
© NXP B.V. 2007. All rights reserved.
Preliminary data sheet
Rev. 02 — 5 March 2007
7 of 64
NXP Semiconductors
UJA1069
LIN fail-safe system basis chip
The exposed die pad at the bottom of the package allows better dissipation of heat from
the SBC via the printed-circuit board. The exposed die pad is not connected to any active
part of the IC and can be left floating, or can be connected to GND for the best EMC
performance.
6.
Functional description
6.1 Introduction
The UJA1069 combines all peripheral functions around a microcontroller within typical
automotive networking applications into one dedicated chip. The functions are as follows:
Power supply for the microcontroller
Switched BAT42 output
System reset
Watchdog with Window mode and Time-out mode
On-chip oscillator
LIN transceiver for serial communication
SPI control interface
Local wake-up input
Inhibit or limp-home output
System inhibit output port
Compatibility with 42 V power supply systems
Fail-safe behavior
6.2 Fail-safe system controller
The fail-safe system controller is the core of the UJA1069 and is supervised by a
watchdog timer which is clocked directly by the dedicated on-chip oscillator. The system
controller manages the register configuration and controls all internal functions of the
SBC. Detailed device status information is collected and presented to the microcontroller.
The system controller also provides the reset and interrupt signals.
The fail-safe system controller is a state machine. The different operating modes and the
transitions between these modes are illustrated in Figure 4. The following sections give
further details about the SBC operating modes.
V3
30
22
unregulated 42 V output (BAT42 related; continuous
output, or cyclic mode synchronized with local wake-up
input)
SENSE
31
23
fast battery interrupt / chatter detector input
BAT42
32
24
42 V battery supply input (connect this pin to BAT14 in
14 V applications)
Table 2.
Pin description …continued
Symbol
Pin
Description
HTSSOP32 HTSSOP24



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